X00TD: reorganize blob

Change-Id: I58390b8bc75edcc0b3bdde9a1f07dc6d6b253169
This commit is contained in:
Aditya Eka Pranata
2026-04-30 18:00:25 +07:00
parent 9bb8e63286
commit 8046e14dfa
977 changed files with 6137 additions and 8043 deletions
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COG
-----BEGIN CERTIFICATE-----
MIIDeTCCAmGgAwIBAgIJAKnFNzqHIGkmMA0GCSqGSIb3DQEBBQUAMGkxFzAVBgNV
BAoTDlFVQUxDT01NLCBJbmMuMScwJQYDVQQLEx5DcnlwdG9ncmFwaGljIE9wZXJh
dGlvbnMgR3JvdXAxJTAjBgNVBAMTHFhUUkEgQWRtbmluaXN0cmF0aXZlIFJvb3Qg
djEwHhcNMTEwMzI0MjAwMzQ3WhcNMjYwMzIwMjAwMzQ3WjBpMRcwFQYDVQQKEw5R
VUFMQ09NTSwgSW5jLjEnMCUGA1UECxMeQ3J5cHRvZ3JhcGhpYyBPcGVyYXRpb25z
IEdyb3VwMSUwIwYDVQQDExxYVFJBIEFkbW5pbmlzdHJhdGl2ZSBSb290IHYxMIIB
IDANBgkqhkiG9w0BAQEFAAOCAQ0AMIIBCAKCAQEAp97dbUn5CzvikZSpHOVkevx7
NRAE5OPlyU3rbO1xCHextKpgpRCmGEXmpifN33Q4atSsf0QIoPiq9WtbYZsMU8DZ
YrLuSFH6P9O9fVyqM0sZZpn97frLD7T+/n7r+PqSdoRJnrTD1kaP1iVJuZSaW+sc
x8TIzCJDMf6qWP0zhizqIdFhb4EtgBkRkExUxsQ0xEmBETrbydSEo90be6wLkRgp
AtU208ZKCGrGcNKCNSp9TDkwLn0V408HkQ+iNw4xWpNURWGEoN3h8hOz+O3M6L2S
RxH21P4CnLj0Ag7FqA35JdUtoeSt8UUJnv9kgBh3X0r9oc20+uwlZTOuZW6SkQIB
A6MmMCQwEgYDVR0TAQH/BAgwBgEB/wIBATAOBgNVHQ8BAf8EBAMCAYYwDQYJKoZI
hvcNAQEFBQADggEBADkdmsCBpZG44cJafBzcp7zIM57/fme8LuxbF0f50CHH2FHR
P+HOLZARqHBFID+D8+hIDu3FQrtZg/SRscO+dvGjdILcp77S0Qne1K9TLu16aMBg
wgWmr4mIRG/upqF93qVBzO6ffGR6uHAE7XtP/sRcLG34TmIgTtXEWhDSJHvcjlcf
kF7+kMLHUrRcj20MTggKkWkDkCB0jyG9rZB9s127mEZjEMkEeoXi33NvV8qO2ChE
yKPPlpKQT7tXghS0WfK73fSNSmWaTmUlL8N9Rb50uA0rZdarNDYI7jqJSlGFgE2+
usHoeIDFQK2C6Zha3diWlbs8F3foMXKIfFVhvxo=
-----END CERTIFICATE-----
Entrust.net Secure Server Certification Authority
-----BEGIN CERTIFICATE-----
MIIE2DCCBEGgAwIBAgIEN0rSQzANBgkqhkiG9w0BAQUFADCBwzELMAkGA1UE
BhMCVVMxFDASBgNVBAoTC0VudHJ1c3QubmV0MTswOQYDVQQLEzJ3d3cuZW50
cnVzdC5uZXQvQ1BTIGluY29ycC4gYnkgcmVmLiAobGltaXRzIGxpYWIuKTEl
MCMGA1UECxMcKGMpIDE5OTkgRW50cnVzdC5uZXQgTGltaXRlZDE6MDgGA1UE
AxMxRW50cnVzdC5uZXQgU2VjdXJlIFNlcnZlciBDZXJ0aWZpY2F0aW9uIEF1
dGhvcml0eTAeFw05OTA1MjUxNjA5NDBaFw0xOTA1MjUxNjM5NDBaMIHDMQsw
CQYDVQQGEwJVUzEUMBIGA1UEChMLRW50cnVzdC5uZXQxOzA5BgNVBAsTMnd3
dy5lbnRydXN0Lm5ldC9DUFMgaW5jb3JwLiBieSByZWYuIChsaW1pdHMgbGlh
Yi4pMSUwIwYDVQQLExwoYykgMTk5OSBFbnRydXN0Lm5ldCBMaW1pdGVkMTow
OAYDVQQDEzFFbnRydXN0Lm5ldCBTZWN1cmUgU2VydmVyIENlcnRpZmljYXRp
b24gQXV0aG9yaXR5MIGdMA0GCSqGSIb3DQEBAQUAA4GLADCBhwKBgQDNKIM0
VBuJ8w+vN5Ex/68xYMmo6LIQaO2f55M28Qpku0f1BBc/I0dNxScZgSYMVHIN
iC3ZH5oSn7yzcdOAGT9HZnuMNSjSuQrfJNqc1lB5gXpa0zf3wkrYKZImZNHk
mGw6AIr1NJtl+O3jEP/9uElY3KDegjlrgbEWGWG5VLbmQwIBA6OCAdcwggHT
MBEGCWCGSAGG+EIBAQQEAwIABzCCARkGA1UdHwSCARAwggEMMIHeoIHboIHY
pIHVMIHSMQswCQYDVQQGEwJVUzEUMBIGA1UEChMLRW50cnVzdC5uZXQxOzA5
BgNVBAsTMnd3dy5lbnRydXN0Lm5ldC9DUFMgaW5jb3JwLiBieSByZWYuIChs
aW1pdHMgbGlhYi4pMSUwIwYDVQQLExwoYykgMTk5OSBFbnRydXN0Lm5ldCBM
aW1pdGVkMTowOAYDVQQDEzFFbnRydXN0Lm5ldCBTZWN1cmUgU2VydmVyIENl
cnRpZmljYXRpb24gQXV0aG9yaXR5MQ0wCwYDVQQDEwRDUkwxMCmgJ6AlhiNo
dHRwOi8vd3d3LmVudHJ1c3QubmV0L0NSTC9uZXQxLmNybDArBgNVHRAEJDAi
gA8xOTk5MDUyNTE2MDk0MFqBDzIwMTkwNTI1MTYwOTQwWjALBgNVHQ8EBAMC
AQYwHwYDVR0jBBgwFoAU8BdiE1U9s/8KAGv7UISX8+1i0BowHQYDVR0OBBYE
FPAXYhNVPbP/CgBr+1CEl/PtYtAaMAwGA1UdEwQFMAMBAf8wGQYJKoZIhvZ9
B0EABAwwChsEVjQuMAMCBJAwDQYJKoZIhvcNAQEFBQADgYEAkNwwAvpkdMKn
CqV8IY00F6j7Rw7/JXyNEwr75Ji174z4xRAN95K+8cPV1ZVqBLssziY2Zcgx
xufuP+NXdYR6Ee9GTxj005i7qIcyunL2POI9n9cd2cNgQ4xYDiKWL2KjLB+6
rQXvqzJ4h6BUcxm1XAX5Uj5tLUUL9wqT6u0G+bI=
-----END CERTIFICATE-----
Entrust Certification Authority (2048)
-----BEGIN CERTIFICATE-----
MIIEKjCCAxKgAwIBAgIEOGPe+DANBgkqhkiG9w0BAQUFADCBtDEUMBIGA1UEChMLRW50cnVzdC5u
ZXQxQDA+BgNVBAsUN3d3dy5lbnRydXN0Lm5ldC9DUFNfMjA0OCBpbmNvcnAuIGJ5IHJlZi4gKGxp
bWl0cyBsaWFiLikxJTAjBgNVBAsTHChjKSAxOTk5IEVudHJ1c3QubmV0IExpbWl0ZWQxMzAxBgNV
BAMTKkVudHJ1c3QubmV0IENlcnRpZmljYXRpb24gQXV0aG9yaXR5ICgyMDQ4KTAeFw05OTEyMjQx
NzUwNTFaFw0yOTA3MjQxNDE1MTJaMIG0MRQwEgYDVQQKEwtFbnRydXN0Lm5ldDFAMD4GA1UECxQ3
d3d3LmVudHJ1c3QubmV0L0NQU18yMDQ4IGluY29ycC4gYnkgcmVmLiAobGltaXRzIGxpYWIuKTEl
MCMGA1UECxMcKGMpIDE5OTkgRW50cnVzdC5uZXQgTGltaXRlZDEzMDEGA1UEAxMqRW50cnVzdC5u
ZXQgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkgKDIwNDgpMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8A
MIIBCgKCAQEArU1LqRKGsuqjIAcVFmQqK0vRvwtKTY7tgHalZ7d4QMBzQshowNtTK91euHaYNZOL
Gp18EzoOH1u3Hs/lJBQesYGpjX24zGtLA/ECDNyrpUAkAH90lKGdCCmziAv1h3edVc3kw37XamSr
hRSGlVuXMlBvPci6Zgzj/L24ScF2iUkZ/cCovYmjZy/Gn7xxGWC4LeksyZB2ZnuU4q941mVTXTzW
nLLPKQP5L6RQstRIzgUyVYr9smRMDuSYB3Xbf9+5CFVghTAp+XtIpGmG4zU/HoZdenoVve8AjhUi
VBcAkCaTvA5JaJG/+EfTnZVCwQ5N328mz8MYIWJmQ3DW1cAH4QIDAQABo0IwQDAOBgNVHQ8BAf8E
BAMCAQYwDwYDVR0TAQH/BAUwAwEB/zAdBgNVHQ4EFgQUVeSB0RGAvtiJuQijMfmhJAkWuXAwDQYJ
KoZIhvcNAQEFBQADggEBADubj1abMOdTmXx6eadNl9cZlZD7Bh/KM3xGY4+WZiT6QBshJ8rmcnPy
T/4xmf3IDExoU8aAghOY+rat2l098c5u9hURlIIM7j+VrxGrD9cv3h8Dj1csHsm7mhpElesYT6Yf
zX1XEC+bBAlahLVu2B064dae0Wx5XnkcFMXj0EyTO2U87d89vqbllRrDtRnDvV5bu/8j72gZyxKT
J1wDLW8w0B62GqzeWvfRqqgnpv55gcR5mTNXuhKwqeBCbJPKVt7+bYQLCIt+jerXmCHG8+c8eS9e
nNFMFY3h7CI3zJpDC5fcgJCNs2ebb0gIFVbPv/ErfF6adulZkMV8gzURZVE=
-----END CERTIFICATE-----
Entrust Root Certification Authority
-----BEGIN CERTIFICATE-----
MIIEkTCCA3mgAwIBAgIERWtQVDANBgkqhkiG9w0BAQUFADCBsDELMAkGA1UEBhMC
VVMxFjAUBgNVBAoTDUVudHJ1c3QsIEluYy4xOTA3BgNVBAsTMHd3dy5lbnRydXN0
Lm5ldC9DUFMgaXMgaW5jb3Jwb3JhdGVkIGJ5IHJlZmVyZW5jZTEfMB0GA1UECxMW
KGMpIDIwMDYgRW50cnVzdCwgSW5jLjEtMCsGA1UEAxMkRW50cnVzdCBSb290IENl
cnRpZmljYXRpb24gQXV0aG9yaXR5MB4XDTA2MTEyNzIwMjM0MloXDTI2MTEyNzIw
NTM0MlowgbAxCzAJBgNVBAYTAlVTMRYwFAYDVQQKEw1FbnRydXN0LCBJbmMuMTkw
NwYDVQQLEzB3d3cuZW50cnVzdC5uZXQvQ1BTIGlzIGluY29ycG9yYXRlZCBieSBy
ZWZlcmVuY2UxHzAdBgNVBAsTFihjKSAyMDA2IEVudHJ1c3QsIEluYy4xLTArBgNV
BAMTJEVudHJ1c3QgUm9vdCBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eTCCASIwDQYJ
KoZIhvcNAQEBBQADggEPADCCAQoCggEBALaVtkNC+sZtKm9I35RMOVcF7sN5EUFo
Nu3s/poBj6E4KPz3EEZmLk0eGrEaTsbRwJWIsMn/MYszA9u3g3s+IIRe7bJWKKf4
4LlAcTfFy0cOlypowCKVYhXbR9n10Cv/gkvJrT7eTNuQgFA/CYqEAOwwCj0Yzfv9
KlmaI5UXLEWeH25DeW0MXJj+SKfFI0dcXv1u5x609mhF0YaDW6KKjbHjKYD+JXGI
rb68j6xSlkuqUY3kEzEZ6E5Nn9uss2rVvDlUccp6en+Q3X0dgNmBu1kmwhH+5pPi
94DkZfs0Nw4pgHBNrziGLp5/V6+eF67rHMsoIV+2HNjnogQi+dPa2MsCAwEAAaOB
sDCBrTAOBgNVHQ8BAf8EBAMCAQYwDwYDVR0TAQH/BAUwAwEB/zArBgNVHRAEJDAi
gA8yMDA2MTEyNzIwMjM0MlqBDzIwMjYxMTI3MjA1MzQyWjAfBgNVHSMEGDAWgBRo
kORnpKZTgMeGZqTx90tD+4S9bTAdBgNVHQ4EFgQUaJDkZ6SmU4DHhmak8fdLQ/uE
vW0wHQYJKoZIhvZ9B0EABBAwDhsIVjcuMTo0LjADAgSQMA0GCSqGSIb3DQEBBQUA
A4IBAQCT1DCw1wMgKtD5Y+iRDAUgqV8ZyntyTtSx29CW+1RaGSwMCPeyvIWonX9t
O1KzKtvn1ISMY/YPyyYBkVBs9F8U4pN0wBOeMDpQ47RgxRzwIkSNcUesyBrJ6Zua
AGAT/3B+XxFNSRuzFVJ7yVTav52Vr2ua2J7p8eRDjeIRRDq/r72DQnNSi6q7pynP
9WQcCk3RvKqsnyrQ/39/2n3qse0wJcGE2jTSW3iDVuycNsMm4hH2Z0kdkquM++v/
eu6FSqdQgPCnXEqULl8FmTxSQeDNtGPPAUO6nIPcj2A781q0tHuu2guQOHXvgR1m
0vdXcDazv/wor3ElhVsT/h5/WrQ8
-----END CERTIFICATE-----
Entrust Root Certification Authority - G2
-----BEGIN CERTIFICATE-----
MIIEPjCCAyagAwIBAgIESlOMKDANBgkqhkiG9w0BAQsFADCBvjELMAkGA1UEBhMC
VVMxFjAUBgNVBAoTDUVudHJ1c3QsIEluYy4xKDAmBgNVBAsTH1NlZSB3d3cuZW50
cnVzdC5uZXQvbGVnYWwtdGVybXMxOTA3BgNVBAsTMChjKSAyMDA5IEVudHJ1c3Qs
IEluYy4gLSBmb3IgYXV0aG9yaXplZCB1c2Ugb25seTEyMDAGA1UEAxMpRW50cnVz
dCBSb290IENlcnRpZmljYXRpb24gQXV0aG9yaXR5IC0gRzIwHhcNMDkwNzA3MTcy
NTU0WhcNMzAxMjA3MTc1NTU0WjCBvjELMAkGA1UEBhMCVVMxFjAUBgNVBAoTDUVu
dHJ1c3QsIEluYy4xKDAmBgNVBAsTH1NlZSB3d3cuZW50cnVzdC5uZXQvbGVnYWwt
dGVybXMxOTA3BgNVBAsTMChjKSAyMDA5IEVudHJ1c3QsIEluYy4gLSBmb3IgYXV0
aG9yaXplZCB1c2Ugb25seTEyMDAGA1UEAxMpRW50cnVzdCBSb290IENlcnRpZmlj
YXRpb24gQXV0aG9yaXR5IC0gRzIwggEiMA0GCSqGSIb3DQEBAQUAA4IBDwAwggEK
AoIBAQC6hLZy254Ma+KZ6TABp3bqMriVQRrJ2mFOWHLP/vaCeb9zYQYKpSfYs1/T
RU4cctZOMvJyig/3gxnQaoCAAEUesMfnmr8SVycco2gvCoe9amsOXmXzHHfV1IWN
cCG0szLni6LVhjkCsbjSR87kyUnEO6fe+1R9V77w6G7CebI6C1XiUJgWMhNcL3hW
wcKUs/Ja5CeanyTXxuzQmyWC48zCxEXFjJd6BmsqEZ+pCm5IO2/b1BEZQvePB7/1
U1+cPvQXLOZprE4yTGJ36rfo5bs0vBmLrpxR57d+tVOxMyLlbc9wPBr64ptntoP0
jaWvYkxN4FisZDQSA/i2jZRjJKRxAgMBAAGjQjBAMA4GA1UdDwEB/wQEAwIBBjAP
BgNVHRMBAf8EBTADAQH/MB0GA1UdDgQWBBRqciZ60B7vfec7aVHUbI2fkBJmqzAN
BgkqhkiG9w0BAQsFAAOCAQEAeZ8dlsa2eT8ijYfThwMEYGprmi5ZiXMRrEPR9RP/
jTkrwPK9T3CMqS/qF8QLVJ7UG5aYMzyorWKiAHarWWluBh1+xLlEjZivEtRh2woZ
Rkfz6/djwUAFQKXSt/S1mja/qYh2iARVBCuch38aNzx+LaUa2NSJXsq9rD1s2G2v
1fN2D807iDginWyTmsQ9v4IbZT+mD12q/OWyFcq1rca8PdCE6OoGcrBNOTJ4vz4R
nAuknZoh8/CbCzB428Hch0P+vGOaysXCHMnHjf87ElgI5rY97HosTvuDls4MPGmH
VHOkc8KT/1EQrBVUAdj8BbGJoX90g5pJ19xOe4pIb4tF9g==
-----END CERTIFICATE-----
DigiCert Assured ID Root CA
-----BEGIN CERTIFICATE-----
MIIDtzCCAp+gAwIBAgIQDOfg5RfYRv6P5WD8G/AwOTANBgkqhkiG9w0BAQUFADBl
MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3
d3cuZGlnaWNlcnQuY29tMSQwIgYDVQQDExtEaWdpQ2VydCBBc3N1cmVkIElEIFJv
b3QgQ0EwHhcNMDYxMTEwMDAwMDAwWhcNMzExMTEwMDAwMDAwWjBlMQswCQYDVQQG
EwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3d3cuZGlnaWNl
cnQuY29tMSQwIgYDVQQDExtEaWdpQ2VydCBBc3N1cmVkIElEIFJvb3QgQ0EwggEi
MA0GCSqGSIb3DQEBAQUAA4IBDwAwggEKAoIBAQCtDhXO5EOAXLGH87dg+XESpa7c
JpSIqvTO9SA5KFhgDPiA2qkVlTJhPLWxKISKityfCgyDF3qPkKyK53lTXDGEKvYP
mDI2dsze3Tyoou9q+yHyUmHfnyDXH+Kx2f4YZNISW1/5WBg1vEfNoTb5a3/UsDg+
wRvDjDPZ2C8Y/igPs6eD1sNuRMBhNZYW/lmci3Zt1/GiSw0r/wty2p5g0I6QNcZ4
VYcgoc/lbQrISXwxmDNsIumH0DJaoroTghHtORedmTpyoeb6pNnVFzF1roV9Iq4/
AUaG9ih5yLHa5FcXxH4cDrC0kqZWs72yl+2qp/C3xag/lRbQ/6GW6whfGHdPAgMB
AAGjYzBhMA4GA1UdDwEB/wQEAwIBhjAPBgNVHRMBAf8EBTADAQH/MB0GA1UdDgQW
BBRF66Kv9JLLgjEtUYunpyGd823IDzAfBgNVHSMEGDAWgBRF66Kv9JLLgjEtUYun
pyGd823IDzANBgkqhkiG9w0BAQUFAAOCAQEAog683+Lt8ONyc3pklL/3cmbYMuRC
dWKuh+vy1dneVrOfzM4UKLkNl2BcEkxY5NM9g0lFWJc1aRqoR+pWxnmrEthngYTf
fwk8lOa4JiwgvT2zKIn3X/8i4peEH+ll74fg38FnSbNd67IJKusm7Xi+fT8r87cm
NW1fiQG2SVufAQWbqz0lwcy2f8Lxb4bG+mRo64EtlOtCt/qMHt1i8b5QZ7dsvfPx
H2sMNgcWfzd8qVttevESRmCD1ycEvkvOl77DZypoEd+A5wwzZr8TDRRu838fYxAe
+o0bJW1sj6W3YQGx0qMmoRBxna3iw/nDmVG3KwcIzi7mULKn+gpFL6Lw8g==
-----END CERTIFICATE-----
DigiCert Global Root CA
-----BEGIN CERTIFICATE-----
MIIDrzCCApegAwIBAgIQCDvgVpBCRrGhdWrJWZHHSjANBgkqhkiG9w0BAQUFADBh
MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3
d3cuZGlnaWNlcnQuY29tMSAwHgYDVQQDExdEaWdpQ2VydCBHbG9iYWwgUm9vdCBD
QTAeFw0wNjExMTAwMDAwMDBaFw0zMTExMTAwMDAwMDBaMGExCzAJBgNVBAYTAlVT
MRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5j
b20xIDAeBgNVBAMTF0RpZ2lDZXJ0IEdsb2JhbCBSb290IENBMIIBIjANBgkqhkiG
9w0BAQEFAAOCAQ8AMIIBCgKCAQEA4jvhEXLeqKTTo1eqUKKPC3eQyaKl7hLOllsB
CSDMAZOnTjC3U/dDxGkAV53ijSLdhwZAAIEJzs4bg7/fzTtxRuLWZscFs3YnFo97
nh6Vfe63SKMI2tavegw5BmV/Sl0fvBf4q77uKNd0f3p4mVmFaG5cIzJLv07A6Fpt
43C/dxC//AH2hdmoRBBYMql1GNXRor5H4idq9Joz+EkIYIvUX7Q6hL+hqkpMfT7P
T19sdl6gSzeRntwi5m3OFBqOasv+zbMUZBfHWymeMr/y7vrTC0LUq7dBMtoM1O/4
gdW7jVg/tRvoSSiicNoxBN33shbyTApOB6jtSj1etX+jkMOvJwIDAQABo2MwYTAO
BgNVHQ8BAf8EBAMCAYYwDwYDVR0TAQH/BAUwAwEB/zAdBgNVHQ4EFgQUA95QNVbR
TLtm8KPiGxvDl7I90VUwHwYDVR0jBBgwFoAUA95QNVbRTLtm8KPiGxvDl7I90VUw
DQYJKoZIhvcNAQEFBQADggEBAMucN6pIExIK+t1EnE9SsPTfrgT1eXkIoyQY/Esr
hMAtudXH/vTBH1jLuG2cenTnmCmrEbXjcKChzUyImZOMkXDiqw8cvpOp/2PV5Adg
06O/nVsJ8dWO41P0jmP6P6fbtGbfYmbW0W5BjfIttep3Sp+dWOIrWcBAI+0tKIJF
PnlUkiaY4IBIqDfv8NZ5YBberOgOzW6sRBc4L0na4UU+Krk2U886UAb3LujEV0ls
YSEY1QSteDwsOoBrp+uvFRTp2InBuThs4pFsiv9kuXclVzDAGySj4dzp30d8tbQk
CAUw7C29C79Fv1C5qfPrmAESrciIxpg0X40KPMbp1ZWVbd4=
-----END CERTIFICATE-----
DigiCert High Assurance EV Root CA
-----BEGIN CERTIFICATE-----
MIIDxTCCAq2gAwIBAgIQAqxcJmoLQJuPC3nyrkYldzANBgkqhkiG9w0BAQUFADBs
MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3
d3cuZGlnaWNlcnQuY29tMSswKQYDVQQDEyJEaWdpQ2VydCBIaWdoIEFzc3VyYW5j
ZSBFViBSb290IENBMB4XDTA2MTExMDAwMDAwMFoXDTMxMTExMDAwMDAwMFowbDEL
MAkGA1UEBhMCVVMxFTATBgNVBAoTDERpZ2lDZXJ0IEluYzEZMBcGA1UECxMQd3d3
LmRpZ2ljZXJ0LmNvbTErMCkGA1UEAxMiRGlnaUNlcnQgSGlnaCBBc3N1cmFuY2Ug
RVYgUm9vdCBDQTCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMbM5XPm
+9S75S0tMqbf5YE/yc0lSbZxKsPVlDRnogocsF9ppkCxxLeyj9CYpKlBWTrT3JTW
PNt0OKRKzE0lgvdKpVMSOO7zSW1xkX5jtqumX8OkhPhPYlG++MXs2ziS4wblCJEM
xChBVfvLWokVfnHoNb9Ncgk9vjo4UFt3MRuNs8ckRZqnrG0AFFoEt7oT61EKmEFB
Ik5lYYeBQVCmeVyJ3hlKV9Uu5l0cUyx+mM0aBhakaHPQNAQTXKFx01p8VdteZOE3
hzBWBOURtCmAEvF5OYiiAhF8J2a3iLd48soKqDirCmTCv2ZdlYTBoSUeh10aUAsg
EsxBu24LUTi4S8sCAwEAAaNjMGEwDgYDVR0PAQH/BAQDAgGGMA8GA1UdEwEB/wQF
MAMBAf8wHQYDVR0OBBYEFLE+w2kD+L9HAdSYJhoIAu9jZCvDMB8GA1UdIwQYMBaA
FLE+w2kD+L9HAdSYJhoIAu9jZCvDMA0GCSqGSIb3DQEBBQUAA4IBAQAcGgaX3Nec
nzyIZgYIVyHbIUf4KmeqvxgydkAQV8GK83rZEWWONfqe/EW1ntlMMUu4kehDLI6z
eM7b41N5cdblIZQB2lWHmiRk9opmzN6cN82oNLFpmyPInngiK3BD41VHMWEZ71jF
hS9OMPagMRYjyOfiZRYzy78aG6A9+MpeizGLYAiJLQwGXFK3xPkKmNEVX58Svnw2
Yzi9RKR/5CYrCsSXaQ3pjOLAEFe4yHYSkVXySGnYvCoCWw9E1CAx2/S6cCZdkGCe
vEsXCS+0yx5DaMkHJ8HSXPfqIbloEpw8nL+e/IBcm2PN7EeqJSdnoDfzAIJ9VNep
+OkuE6N36B9K
-----END CERTIFICATE-----
VeriSign Class 1 Public Primary Certification Authority
-----BEGIN CERTIFICATE-----
MIICPTCCAaYCEQDNun9W8N/kvFT+IqyzcqpVMA0GCSqGSIb3DQEBAgUAMF8xCzAJ
BgNVBAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE3MDUGA1UECxMuQ2xh
c3MgMSBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eTAeFw05
NjAxMjkwMDAwMDBaFw0yODA4MDEyMzU5NTlaMF8xCzAJBgNVBAYTAlVTMRcwFQYD
VQQKEw5WZXJpU2lnbiwgSW5jLjE3MDUGA1UECxMuQ2xhc3MgMSBQdWJsaWMgUHJp
bWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eTCBnzANBgkqhkiG9w0BAQEFAAOB
jQAwgYkCgYEA5Rm/baNWYS2ZSHH2Z965jeu3noaACpEO+jglr0aIguVzqKCbJF0N
H8xlbgyw0FaEGIeaBpsQoXPftFg5a27B9hXVqKg/qhIGjTGsf7A01480Z4gJzRQR
4k5FVmkfeAKA2txHkSm7NsljXMXg1y2He6G3MrB7MLoqLzGq7qNn2tsCAwEAATAN
BgkqhkiG9w0BAQIFAAOBgQBMP7iLxmjf7kMzDl3ppssHhE16M/+SG/Q2rdiVIjZo
EWx8QszznC7EBz8UsA9P/5CSdvnivErpj82ggAr3xSnxgiJduLHdgSOjeyUVRjB5
FvjqBUuUfx3CHMjjt/QQQDwTw18fU+hI5Ia0e6E1sHslurjTjqs/OJ0ANACY89Fx
lA==
-----END CERTIFICATE-----
VeriSign Class 2 Public Primary Certification Authority
-----BEGIN CERTIFICATE-----
MIICPDCCAaUCEC0b/EoXjaOR6+f/9YtFvgswDQYJKoZIhvcNAQECBQAwXzELMAkG
A1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMTcwNQYDVQQLEy5DbGFz
cyAyIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9yaXR5MB4XDTk2
MDEyOTAwMDAwMFoXDTI4MDgwMTIzNTk1OVowXzELMAkGA1UEBhMCVVMxFzAVBgNV
BAoTDlZlcmlTaWduLCBJbmMuMTcwNQYDVQQLEy5DbGFzcyAyIFB1YmxpYyBQcmlt
YXJ5IENlcnRpZmljYXRpb24gQXV0aG9yaXR5MIGfMA0GCSqGSIb3DQEBAQUAA4GN
ADCBiQKBgQC2WoujDWojg4BrzzmH9CETMwZMJaLtVRKXxaeAufqDwSCg+i8VDXyh
YGt+eSz6Bg86rvYbb7HS/y8oUl+DfUvEerf4Zh+AVPy3wo5ZShRXRtGak75BkQO7
FYCTXOvnzAhsPz6zSvz/S2wj1VCCJkQZjiPDceoZJEcEnnW/yKYAHwIDAQABMA0G
CSqGSIb3DQEBAgUAA4GBAIobK/o5wXTXXtgZZKJYSi034DNHD6zt96rbHuSLBlxg
J8pFUs4W7z8GZOeUaHxgMxURaa+dYo2jA1Rrpr7l7gUYYAS/QoD90KioHgE796Nc
r6Pc5iaAIzy4RHT3Cq5Ji2F4zCS/iIqnDupzGUH9TQPwiNHleI2lKk/2lw0Xd8rY
-----END CERTIFICATE-----
VeriSign Class 3 Public Primary Certification Authority
-----BEGIN CERTIFICATE-----
MIICPDCCAaUCEDyRMcsf9tAbDpq40ES/Er4wDQYJKoZIhvcNAQEFBQAwXzELMAkG
A1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMTcwNQYDVQQLEy5DbGFz
cyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9yaXR5MB4XDTk2
MDEyOTAwMDAwMFoXDTI4MDgwMjIzNTk1OVowXzELMAkGA1UEBhMCVVMxFzAVBgNV
BAoTDlZlcmlTaWduLCBJbmMuMTcwNQYDVQQLEy5DbGFzcyAzIFB1YmxpYyBQcmlt
YXJ5IENlcnRpZmljYXRpb24gQXV0aG9yaXR5MIGfMA0GCSqGSIb3DQEBAQUAA4GN
ADCBiQKBgQDJXFme8huKARS0EN8EQNvjV69qRUCPhAwL0TPZ2RHP7gJYHyX3KqhE
BarsAx94f56TuZoAqiN91qyFomNFx3InzPRMxnVx0jnvT0Lwdd8KkMaOIG+YD/is
I19wKTakyYbnsZogy1Olhec9vn2a/iRFM9x2Fe0PonFkTGUugWhFpwIDAQABMA0G
CSqGSIb3DQEBBQUAA4GBABByUqkFFBkyCEHwxWsKzH4PIRnN5GfcX6kb5sroc50i
2JhucwNhkcV8sEVAbkSdjbCxlnRhLQ2pRdKkkirWmnWXbj9T/UWZYB2oK0z5XqcJ
2HUw19JlYD1n1khVdWk/kfVIC0dpImmClr7JyDiGSnoscxlIaU5rfGW/D/xwzoiQ
-----END CERTIFICATE-----
VeriSign Class 1 Public Primary Certification Authority - G2
-----BEGIN CERTIFICATE-----
MIIDAjCCAmsCEEzH6qqYPnHTkxD4PTqJkZIwDQYJKoZIhvcNAQEFBQAwgcExCzAJ
BgNVBAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xh
c3MgMSBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcy
MTowOAYDVQQLEzEoYykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3Jp
emVkIHVzZSBvbmx5MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMB4X
DTk4MDUxODAwMDAwMFoXDTI4MDgwMTIzNTk1OVowgcExCzAJBgNVBAYTAlVTMRcw
FQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xhc3MgMSBQdWJsaWMg
UHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcyMTowOAYDVQQLEzEo
YykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5
MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMIGfMA0GCSqGSIb3DQEB
AQUAA4GNADCBiQKBgQCq0Lq+Fi24g9TK0g+8djHKlNgdk4xWArzZbxpvUjZudVYK
VdPfQ4chEWWKfo+9Id5rMj8bhDSVBZ1BNeuS65bdqlk/AVNtmU/t5eIqWpDBucSm
Fc/IReumXY6cPvBkJHalzasab7bYe1FhbqZ/h8jit+U03EGI6glAvnOSPWvndQID
AQABMA0GCSqGSIb3DQEBBQUAA4GBAKlPww3HZ74sy9mozS11534Vnjty637rXC0J
h9ZrbWB85a7FkCMMXErQr7Fd88e2CtvgFZMN3QO8x3aKtd1Pw5sTdbgBwObJW2ul
uIncrKTdcu1OofdPvAbT6shkdHvClUGcZXNY8ZCaPGqxmMnEh7zPRW1F4m4iP/68
DzFc6PLZ
-----END CERTIFICATE-----
VeriSign Class 2 Public Primary Certification Authority - G2
-----BEGIN CERTIFICATE-----
MIIDAzCCAmwCEQC5L2DMiJ+hekYJuFtwbIqvMA0GCSqGSIb3DQEBBQUAMIHBMQsw
CQYDVQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xPDA6BgNVBAsTM0Ns
YXNzIDIgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkgLSBH
MjE6MDgGA1UECxMxKGMpIDE5OTggVmVyaVNpZ24sIEluYy4gLSBGb3IgYXV0aG9y
aXplZCB1c2Ugb25seTEfMB0GA1UECxMWVmVyaVNpZ24gVHJ1c3QgTmV0d29yazAe
Fw05ODA1MTgwMDAwMDBaFw0yODA4MDEyMzU5NTlaMIHBMQswCQYDVQQGEwJVUzEX
MBUGA1UEChMOVmVyaVNpZ24sIEluYy4xPDA6BgNVBAsTM0NsYXNzIDIgUHVibGlj
IFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkgLSBHMjE6MDgGA1UECxMx
KGMpIDE5OTggVmVyaVNpZ24sIEluYy4gLSBGb3IgYXV0aG9yaXplZCB1c2Ugb25s
eTEfMB0GA1UECxMWVmVyaVNpZ24gVHJ1c3QgTmV0d29yazCBnzANBgkqhkiG9w0B
AQEFAAOBjQAwgYkCgYEAp4gBIXQs5xoD8JjhlzwPIQjxnNuX6Zr8wgQGE75fUsjM
HiwSViy4AWkszJkfrbCWrnkE8hM5wXuYuggs6MKEEyyqaekJ9MepAqRCwiNPStjw
DqL7MWzJ5m+ZJwf15vRMeJ5t60aG+rmGyVTyssSv1EYcWskVMP8NbPUtDm3Of3cC
AwEAATANBgkqhkiG9w0BAQUFAAOBgQByLvl/0fFx+8Se9sVeUYpAmLho+Jscg9ji
nb3/7aHmZuovCfTK1+qlK5X2JGCGTUQug6XELaDTrnhpb3LabK4I8GOSN+a7xDAX
rXfMSTWqz9iP0b63GJZHc2pUIjRkLbYWm1lbtFFZOrMLFPQS32eg9K0yZF6xRnIn
jBJ7xUS0rg==
-----END CERTIFICATE-----
VeriSign Class 3 Public Primary Certification Authority - G2
-----BEGIN CERTIFICATE-----
MIIDAjCCAmsCEH3Z/gfPqB63EHln+6eJNMYwDQYJKoZIhvcNAQEFBQAwgcExCzAJ
BgNVBAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xh
c3MgMyBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcy
MTowOAYDVQQLEzEoYykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3Jp
emVkIHVzZSBvbmx5MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMB4X
DTk4MDUxODAwMDAwMFoXDTI4MDgwMTIzNTk1OVowgcExCzAJBgNVBAYTAlVTMRcw
FQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xhc3MgMyBQdWJsaWMg
UHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcyMTowOAYDVQQLEzEo
YykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5
MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMIGfMA0GCSqGSIb3DQEB
AQUAA4GNADCBiQKBgQDMXtERXVxp0KvTuWpMmR9ZmDCOFoUgRm1HP9SFIIThbbP4
pO0M8RcPO/mn+SXXwc+EY/J8Y8+iR/LGWzOOZEAEaMGAuWQcRXfH2G71lSk8UOg0
13gfqLptQ5GVj0VXXn7F+8qkBOvqlzdUMG+7AUcyM83cV5tkaWH4mx0ciU9cZwID
AQABMA0GCSqGSIb3DQEBBQUAA4GBAFFNzb5cy5gZnBWyATl4Lk0PZ3BwmcYQWpSk
U01UbSuvDV1Ai2TT1+7eVmGSX6bEHRBhNtMsJzzoKQm5EWR0zLVznxxIqbxhAe7i
F6YM40AIOw7n60RzKprxaZLvcRTDOaxxp5EJb+RxBrO6WVcmeQD2+A2iMzAo1KpY
oJ2daZH9
-----END CERTIFICATE-----
VeriSign Class 4 Public Primary Certification Authority - G2
-----BEGIN CERTIFICATE-----
MIIDAjCCAmsCEDKIjprS9esTR/h/xCA3JfgwDQYJKoZIhvcNAQEFBQAwgcExCzAJ
BgNVBAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xh
c3MgNCBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcy
MTowOAYDVQQLEzEoYykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3Jp
emVkIHVzZSBvbmx5MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMB4X
DTk4MDUxODAwMDAwMFoXDTI4MDgwMTIzNTk1OVowgcExCzAJBgNVBAYTAlVTMRcw
FQYDVQQKEw5WZXJpU2lnbiwgSW5jLjE8MDoGA1UECxMzQ2xhc3MgNCBQdWJsaWMg
UHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAtIEcyMTowOAYDVQQLEzEo
YykgMTk5OCBWZXJpU2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5
MR8wHQYDVQQLExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMIGfMA0GCSqGSIb3DQEB
AQUAA4GNADCBiQKBgQC68OTP+cSuhVS5B1f5j8V/aBH4xBewRNzjMHPVKmIquNDM
HO0oW369atyzkSTKQWI8/AIBvxwWMZQFl3Zuoq29YRdsTjCG8FE3KlDHqGKB3FtK
qsGgtG7rL+VXxbErQHDbWk2hjh+9Ax/YA9SPTJlxvOKCzFjomDqG04Y48wApHwID
AQABMA0GCSqGSIb3DQEBBQUAA4GBAIWMEsGnuVAVess+rLhDityq3RS6iYF+ATwj
cSGIL4LcY/oCRaxFWdcqWERbt5+BO5JoPeI3JPV7bI92NZYJqFmduc4jq3TWg/0y
cyfYaT5DdPauxYma51N86Xv2S/PBZYPejYqcPIiNOVn8qj8ijaHBZlCBckztImRP
T8qAkbYp
-----END CERTIFICATE-----
VeriSign Class 1 Public Primary Certification Authority - G3
-----BEGIN CERTIFICATE-----
MIIEGjCCAwICEQCLW3VWhFSFCwDPrzhIzrGkMA0GCSqGSIb3DQEBBQUAMIHKMQsw
CQYDVQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZl
cmlTaWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWdu
LCBJbmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlT
aWduIENsYXNzIDEgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3Jp
dHkgLSBHMzAeFw05OTEwMDEwMDAwMDBaFw0zNjA3MTYyMzU5NTlaMIHKMQswCQYD
VQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZlcmlT
aWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWduLCBJ
bmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlTaWdu
IENsYXNzIDEgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkg
LSBHMzCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAN2E1Lm0+afY8wR4
nN493GwTFtl63SRRZsDHJlkNrAYIwpTRMx/wgzUfbhvI3qpuFU5UJ+/EbRrsC+MO
8ESlV8dAWB6jRx9x7GD2bZTIGDnt/kIYVt/kTEkQeE4BdjVjEjbdZrwBBDajVWjV
ojYJrKshJlQGrT/KFOCsyq0GHZXi+J3x4GD/wn91K0zM2v6HmSHquv4+VNfSWXjb
PG7PoBMAGrgnoeS+Z5bKoMWznN3JdZ7rMJpfo83ZrngZPyPpXNspva1VyBtUjGP2
6KbqxzcSXKMpHgLZ2x87tNcPVkeBFQRKr4Mn0cVYiMHd9qqnoxjaaKptEVHhv2Vr
n5Z20T0CAwEAATANBgkqhkiG9w0BAQUFAAOCAQEAq2aN17O6x5q25lXQBfGfMY1a
qtmqRiYPce2lrVNWYgFHKkTp/j90CxObufRNG7LRX7K20ohcs5/Ny9Sn2WCVhDr4
wTcdYcrnsMXlkdpUpqwxga6X3s0IrLjAl4B/bnKk52kTlWUfxJM8/XmPBNQ+T+r3
ns7NZ3xPZQL/kYVUc8f/NveGLezQXk//EZ9yBta4GvFMDSZl4kSAHsef493oCtrs
pSCAaWihT37ha88HQfqDjrw43bAuEbFrskLMmrz5SCJ5ShkPshw+IHTZasO+8ih4
E1Z5T21Q6huwtVexN2ZYI/PcD98Kh8TvhgXVOBRgmaNL3gaWcSzy27YfpO8/7g==
-----END CERTIFICATE-----
VeriSign Class 2 Public Primary Certification Authority - G3
-----BEGIN CERTIFICATE-----
MIIEGTCCAwECEGFwy0mMX5hFKeewptlQW3owDQYJKoZIhvcNAQEFBQAwgcoxCzAJ
BgNVBAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjEfMB0GA1UECxMWVmVy
aVNpZ24gVHJ1c3QgTmV0d29yazE6MDgGA1UECxMxKGMpIDE5OTkgVmVyaVNpZ24s
IEluYy4gLSBGb3IgYXV0aG9yaXplZCB1c2Ugb25seTFFMEMGA1UEAxM8VmVyaVNp
Z24gQ2xhc3MgMiBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0
eSAtIEczMB4XDTk5MTAwMTAwMDAwMFoXDTM2MDcxNjIzNTk1OVowgcoxCzAJBgNV
BAYTAlVTMRcwFQYDVQQKEw5WZXJpU2lnbiwgSW5jLjEfMB0GA1UECxMWVmVyaVNp
Z24gVHJ1c3QgTmV0d29yazE6MDgGA1UECxMxKGMpIDE5OTkgVmVyaVNpZ24sIElu
Yy4gLSBGb3IgYXV0aG9yaXplZCB1c2Ugb25seTFFMEMGA1UEAxM8VmVyaVNpZ24g
Q2xhc3MgMiBQdWJsaWMgUHJpbWFyeSBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eSAt
IEczMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEArwoNwtUs22e5LeWU
J92lvuCwTY+zYVY81nzD9M0+hsuiiOLh2KRpxbXiv8GmR1BeRjmL1Za6tW8UvxDO
JxOeBUebMXoT2B/Z0wI3i60sR/COgQanDTAM6/c8DyAd3HJG7qUCyFvDyVZpTMUY
wZF7C9UTAJu878NIPkZgIIUq1ZC2zYugzDLdt/1AVbJQHFauzI13TccgTacxdu9o
koqQHgiBVrKtaaNS0MscxCM9H5n+TOgWY47GCI72MfbS+uV23bUckqNJzc0BzWjN
qWm6o+sdDZykIKbBoMXRRkwXbdKsZj+WjOCE1Db/IlnF+RFgqF8EffIa9iVCYQ/E
Srg+iQIDAQABMA0GCSqGSIb3DQEBBQUAA4IBAQA0JhU8wI1NQ0kdvekhktdmnLfe
xbjQ5F1fdiLAJvmEOjr5jLX77GDx6M4EsMjdpwOPMPOY36TmpDHf0xwLRtxyID+u
7gU8pDM/CzmscHhzS5kr3zDCVLCoO1Wh/hYozUK9dG6A2ydEp85EXdQbkJgNHkKU
sQAsBNB0owIFImNjzYO1+8FtYmtpdf1dcEG59b98377BMnMiIYtYgXsVkXq642RI
sH/7NiXaldDxJBQX3RiAa0YjOVT1jmIJBB2UkKab5iXiQkWquJCtvgiPqQtCGJTP
cjnhsUPgKM+351psE2tJs//jGHyJizNdrDPXp/naOlXJWBD5qu9ats9LS98q
-----END CERTIFICATE-----
VeriSign Class 3 Public Primary Certification Authority - G3
-----BEGIN CERTIFICATE-----
MIIEGjCCAwICEQCbfgZJoz5iudXukEhxKe9XMA0GCSqGSIb3DQEBBQUAMIHKMQsw
CQYDVQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZl
cmlTaWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWdu
LCBJbmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlT
aWduIENsYXNzIDMgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3Jp
dHkgLSBHMzAeFw05OTEwMDEwMDAwMDBaFw0zNjA3MTYyMzU5NTlaMIHKMQswCQYD
VQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZlcmlT
aWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWduLCBJ
bmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlTaWdu
IENsYXNzIDMgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkg
LSBHMzCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMu6nFL8eB8aHm8b
N3O9+MlrlBIwT/A2R/XQkQr1F8ilYcEWQE37imGQ5XYgwREGfassbqb1EUGO+i2t
KmFZpGcmTNDovFJbcCAEWNF6yaRpvIMXZK0Fi7zQWM6NjPXr8EJJC52XJ2cybuGu
kxUccLwgTS8Y3pKI6GyFVxEa6X7jJhFUokWWVYPKMIno3Nij7SqAP395ZVc+FSBm
CC+Vk7+qRy+oRpfwEuL+wgorUeZ25rdGt+INpsyow0xZVYnm6FNcHOqd8GIWC6fJ
Xwzw3sJ2zq/3avL6QaaiMxTJ5Xpj055iN9WFZZ4O5lMkdBteHRJTW8cs54NJOxWu
imi5V5cCAwEAATANBgkqhkiG9w0BAQUFAAOCAQEAERSWwauSCPc/L8my/uRan2Te
2yFPhpk0djZX3dAVL8WtfxUfN2JzPtTnX84XA9s1+ivbrmAJXx5fj267Cz3qWhMe
DGBvtcC1IyIuBwvLqXTLR7sdwdela8wv0kL9Sd2nic9TutoAWii/gt/4uhMdUIaC
/Y4wjylGsB49Ndo4YhYYSq3mtlFs3q9i6wHQHiT+eo8SGhJouPtmmRQURVyu565p
F4ErWjfJXir0xuKhXFSbplQAz/DxwceYMBo7Nhbbo27q/a2ywtrvAkcTisDxszGt
TxzhT5yvDwyd93gN2PQ1VoDat20Xj50egWTh/sVFuq1ruQp6Tk9LhO5L8X3dEQ==
-----END CERTIFICATE-----
VeriSign Class 4 Public Primary Certification Authority - G3
-----BEGIN CERTIFICATE-----
MIIEGjCCAwICEQDsoKeLbnVqAc/EfMwvlF7XMA0GCSqGSIb3DQEBBQUAMIHKMQsw
CQYDVQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZl
cmlTaWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWdu
LCBJbmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlT
aWduIENsYXNzIDQgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3Jp
dHkgLSBHMzAeFw05OTEwMDEwMDAwMDBaFw0zNjA3MTYyMzU5NTlaMIHKMQswCQYD
VQQGEwJVUzEXMBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZlcmlT
aWduIFRydXN0IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAxOTk5IFZlcmlTaWduLCBJ
bmMuIC0gRm9yIGF1dGhvcml6ZWQgdXNlIG9ubHkxRTBDBgNVBAMTPFZlcmlTaWdu
IENsYXNzIDQgUHVibGljIFByaW1hcnkgQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkg
LSBHMzCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAK3LpRFpxlmr8Y+1
GQ9Wzsy1HyDkniYlS+BzZYlZ3tCD5PUPtbut8XzoIfzk6AzufEUiGXaStBO3IFsJ
+mGuqPKljYXCKtbeZjbSmwL0qJJgfJxptI8kHtCGUvYynEFYHiK9zUVilQhu0Gbd
U6LM8BDcVHOLBKFGMzNcF0C5nk3T875Vg+ixiY5afJqWIpA7iCXy0lOIAgwLePLm
NxdLMEYH5IBtptiWLugs+BGzOA1mppvqySNb247i8xOOGlktqgLw7KSHZtzBP/XY
ufTsgsbSPZUd5cBPhMnZo0QoBmrXRazwa2rvTl/4EYIeOGM0ZlDUPpNz+jDDZq3/
ky2X7wMCAwEAATANBgkqhkiG9w0BAQUFAAOCAQEAj/ola09b5KROJ1WrIhVZPMq1
CtRK26vdoV9TxaBXOcLORyu+OshWv8LZJxA6sQU8wHcxuzrTBXttmhwwjIDLk5Mq
g6sFUYICABFna/OIYUdfA5PVWw3g8dShMjWFsjrbsIKr0csKvE+MW8VLADsfKoKm
fjaF3H48ZwC15DtS4KjrXRX5xm3wrR0OhbepmnMUWluPQSjA1egtTaRezarZ7c7c
2NU8Qh0XwRJdRTjDOPP8hS6DRkiy1yBfkjaP53kPmF6Z6PDQpLv1U70qzlmwr25/
bLvSHgCwIe34QWKCudiyxLtGUPMxxY8BqHTr9Xgn2uf3ZkPznoM+IKrDNWCRzg==
-----END CERTIFICATE-----
VeriSign Class 3 Public Primary Certification Authority - G4
-----BEGIN CERTIFICATE-----
MIIDhDCCAwqgAwIBAgIQL4D+I4wOIg9IZxIokYesszAKBggqhkjOPQQDAzCByjEL
MAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQLExZW
ZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNyBWZXJpU2ln
biwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxWZXJp
U2lnbiBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9y
aXR5IC0gRzQwHhcNMDcxMTA1MDAwMDAwWhcNMzgwMTE4MjM1OTU5WjCByjELMAkG
A1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQLExZWZXJp
U2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNyBWZXJpU2lnbiwg
SW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxWZXJpU2ln
biBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9yaXR5
IC0gRzQwdjAQBgcqhkjOPQIBBgUrgQQAIgNiAASnVnp8Utpkmw4tXNherJI9/gHm
GUo9FANL+mAnINmDiWn6VMaaGF5VKmTeBvaNSjutEDxlPZCIBIngMGGzrl0Bp3ve
fLK+ymVhAIau2o970ImtTR1ZmkGxvEeA3J5iw/mjgbIwga8wDwYDVR0TAQH/BAUw
AwEB/zAOBgNVHQ8BAf8EBAMCAQYwbQYIKwYBBQUHAQwEYTBfoV2gWzBZMFcwVRYJ
aW1hZ2UvZ2lmMCEwHzAHBgUrDgMCGgQUj+XTGoasjY5rw8+AatRIGCx7GS4wJRYj
aHR0cDovL2xvZ28udmVyaXNpZ24uY29tL3ZzbG9nby5naWYwHQYDVR0OBBYEFLMW
kf3upm7ktS5Jj4d4gYDs5bG1MAoGCCqGSM49BAMDA2gAMGUCMGYhDBgmYFo4e1ZC
4Kf8NoRRkSAsdk1DPcQdhCPQrNZ8NQbOzWm9kA3bbEhCHQ6qQgIxAJw9SDkjOVga
FRJZap7v1VmyHVIsmXHNxynfGyphe3HR3vPA5Q06Sqotp9iGKt0uEA==
-----END CERTIFICATE-----
VeriSign Class 3 Public Primary Certification Authority - G5
-----BEGIN CERTIFICATE-----
MIIE0zCCA7ugAwIBAgIQGNrRniZ96LtKIVjNzGs7SjANBgkqhkiG9w0BAQUFADCB
yjELMAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQL
ExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNiBWZXJp
U2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxW
ZXJpU2lnbiBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0
aG9yaXR5IC0gRzUwHhcNMDYxMTA4MDAwMDAwWhcNMzYwNzE2MjM1OTU5WjCByjEL
MAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQLExZW
ZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNiBWZXJpU2ln
biwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxWZXJp
U2lnbiBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9y
aXR5IC0gRzUwggEiMA0GCSqGSIb3DQEBAQUAA4IBDwAwggEKAoIBAQCvJAgIKXo1
nmAMqudLO07cfLw8RRy7K+D+KQL5VwijZIUVJ/XxrcgxiV0i6CqqpkKzj/i5Vbex
t0uz/o9+B1fs70PbZmIVYc9gDaTY3vjgw2IIPVQT60nKWVSFJuUrjxuf6/WhkcIz
SdhDY2pSS9KP6HBRTdGJaXvHcPaz3BJ023tdS1bTlr8Vd6Gw9KIl8q8ckmcY5fQG
BO+QueQA5N06tRn/Arr0PO7gi+s3i+z016zy9vA9r911kTMZHRxAy3QkGSGT2RT+
rCpSx4/VBEnkjWNHiDxpg8v+R70rfk/Fla4OndTRQ8Bnc+MUCH7lP59zuDMKz10/
NIeWiu5T6CUVAgMBAAGjgbIwga8wDwYDVR0TAQH/BAUwAwEB/zAOBgNVHQ8BAf8E
BAMCAQYwbQYIKwYBBQUHAQwEYTBfoV2gWzBZMFcwVRYJaW1hZ2UvZ2lmMCEwHzAH
BgUrDgMCGgQUj+XTGoasjY5rw8+AatRIGCx7GS4wJRYjaHR0cDovL2xvZ28udmVy
aXNpZ24uY29tL3ZzbG9nby5naWYwHQYDVR0OBBYEFH/TZafC3ey78DAJ80M5+gKv
MzEzMA0GCSqGSIb3DQEBBQUAA4IBAQCTJEowX2LP2BqYLz3q3JktvXf2pXkiOOzE
p6B4Eq1iDkVwZMXnl2YtmAl+X6/WzChl8gGqCBpH3vn5fJJaCGkgDdk+bW48DW7Y
5gaRQBi5+MHt39tBquCWIMnNZBU4gcmU7qKEKQsTb47bDN0lAtukixlE0kF6BWlK
WE9gyn6CagsCqiUXObXbf+eEZSqVir2G3l6BFoMtEMze/aiCKm0oHw0LxOXnGiYZ
4fQRbxC1lfznQgUy286dUV4otp6F01vvpX1FQHKOtw5rDgb7MzVIcbidJ4vEZV8N
hnacRHr2lVz2XTIIM6RUthg/aFzyQkqFOFSDX9HoLPKsEdao7WNq
-----END CERTIFICATE-----
VeriSign Universal Root Certification Authority
-----BEGIN CERTIFICATE-----
MIIEuTCCA6GgAwIBAgIQQBrEZCGzEyEDDrvkEhrFHTANBgkqhkiG9w0BAQsFADCB
vTELMAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQL
ExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwOCBWZXJp
U2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MTgwNgYDVQQDEy9W
ZXJpU2lnbiBVbml2ZXJzYWwgUm9vdCBDZXJ0aWZpY2F0aW9uIEF1dGhvcml0eTAe
Fw0wODA0MDIwMDAwMDBaFw0zNzEyMDEyMzU5NTlaMIG9MQswCQYDVQQGEwJVUzEX
MBUGA1UEChMOVmVyaVNpZ24sIEluYy4xHzAdBgNVBAsTFlZlcmlTaWduIFRydXN0
IE5ldHdvcmsxOjA4BgNVBAsTMShjKSAyMDA4IFZlcmlTaWduLCBJbmMuIC0gRm9y
IGF1dGhvcml6ZWQgdXNlIG9ubHkxODA2BgNVBAMTL1ZlcmlTaWduIFVuaXZlcnNh
bCBSb290IENlcnRpZmljYXRpb24gQXV0aG9yaXR5MIIBIjANBgkqhkiG9w0BAQEF
AAOCAQ8AMIIBCgKCAQEAx2E3XrEBNNti1xWb/1hajCMj1mCOkdeQmIN65lgZOIzF
9uVkhbSicfvtvbnazU0AtMgtc6XHaXGVHzk8skQHnOgO+k1KxCHfKWGPMiJhgsWH
H26MfF8WIFFE0XBPV+rjHOPMee5Y2A7Cs0WTwCznmhcrewA3ekEzeOEz4vMQGn+H
LL729fdC4uW/h2KJXwBL38Xd5HVEMkE6HnFuacsLdUYI0crSK5XQz/u5QGtkjFdN
/BMReYTtXlT2NJ8IAfMQJQYXStrxHXpma5hgZqTZ79IugvHw7wnqRMkVauIDbjPT
rJ9VAMf2CGqUuV/c4DPxhGD5WycRtPwW8rtWaoAljQIDAQABo4GyMIGvMA8GA1Ud
EwEB/wQFMAMBAf8wDgYDVR0PAQH/BAQDAgEGMG0GCCsGAQUFBwEMBGEwX6FdoFsw
WTBXMFUWCWltYWdlL2dpZjAhMB8wBwYFKw4DAhoEFI/l0xqGrI2Oa8PPgGrUSBgs
exkuMCUWI2h0dHA6Ly9sb2dvLnZlcmlzaWduLmNvbS92c2xvZ28uZ2lmMB0GA1Ud
DgQWBBS2d/ppSEefUxLVwuoHMnYH0ZcHGTANBgkqhkiG9w0BAQsFAAOCAQEASvj4
sAPmLGd75JR3Y8xuTPl9Dg3cyLk1uXBPY/ok+myDjEedO2Pzmvl2MpWRsXe8rJq+
seQxIcaBlVZaDrHC1LGmWazxY8u4TB1ZkErvkBYoH1quEPuBUDgMbMzxPcP1Y+Oz
4yHJJDnp/RVmRvQbEdBNc6N9Rvk97ahfYtTxP/jgdFcrGJ2BtMQo2pSXpXDrrB2+
BxHw1dvd5Yzw1TKwg+ZX4o+/vqGqvz0dtdQ46tewXDpPaj+PwGZsY6rp2aQW9IHR
lRQOfc2VNNnSj3BzgXucfr2YYdhFh5iQxeuGMMY1v/D/w1WIg0vvBZIGcfK4mJO3
7M2CYfE45k+XmCpajQ==
-----END CERTIFICATE-----
+83 -2
View File
@@ -1259,8 +1259,8 @@
</list>
</listitem>
<!-- Configuration for monaco-->
<listitem name="monaco">
<!-- Configuration for lahaina_pt -->
<listitem name="lahaina_pt">
<data name="qos_enabled" type="int"> 1 </data>
<data name="rmnet_data_enabled" type="int"> 1 </data>
@@ -1311,5 +1311,86 @@
<data type="string"> rmnet_data16 </data>
</list>
</listitem>
<!-- Configuration for monaco-->
<listitem name="monaco">
<data name="qos_enabled" type="int"> 1 </data>
<data name="rmnet_data_enabled" type="int"> 1 </data>
<data name="phys_net_dev" type="string"> rmnet_ipa0 </data>
<data name="netmgr_listen_ev_proto" type="int"> 1 </data>
<data name="single_qmux_channel_enabled" type="int"> 1 </data>
<data name="single_qmux_channel_name" type="string"> rmnet0 </data>
<data name="num_dsi_handles" type="int"> 11 </data>
<list name="device_names">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<list name="control_port_names">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
</listitem>
<!-- Configuration for QTang -->
<listitem name="qtang">
<data name="qos_enabled" type="int"> 1 </data>
<data name="rmnet_data_enabled" type="int"> 1 </data>
<data name="phys_net_dev" type="string"> rmnet_ipa0 </data>
<data name="netmgr_listen_ev_proto" type="int"> 1 </data>
<data name="single_qmux_channel_enabled" type="int"> 1 </data>
<data name="single_qmux_channel_name" type="string"> rmnet0 </data>
<data name="num_dsi_handles" type="int"> 11 </data>
<list name="device_names">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<list name="control_port_names">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
</listitem>
</list>
Vendored Executable → Regular
+242 -11
View File
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
Netmgr Module configuration XML file
Copyright (c) 2013, 2016-2021 Qualcomm Technologies, Inc.
Copyright (c) 2013, 2016-2022 Qualcomm Technologies, Inc.
All Rights Reserved.
Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
@@ -2803,6 +2803,7 @@
<data name="kfc_mode" type="int"> 4 </data>
<data name="kfc_qmap" type="int"> 1 </data>
<data name="qmi_pc" type="int"> 1 </data>
<data name="dfc_ps_ext" type="int"> 0 </data>
<data name="tcp_ack_prio" type="int"> 1 </data>
<data name="single_qmux_ch_enabled" type="int"> 1 </data>
@@ -3224,16 +3225,16 @@
<data name="static_rev_links" type="int"> 4 </data>
</listitem>
<!-- monaco parameters -->
<listitem name = "monaco">
<!-- lahaina_pt parameters -->
<listitem name = "lahaina_pt">
<data name="qmi_dpm_enabled" type="int"> 1 </data>
<data name="use_qmuxd" type="int"> 0 </data>
<data name="dpm_retry_timeout" type="int"> 10000 </data>
<data name="wda_data_format_enabled" type="int"> 1 </data>
<data name="kfc_mode" type="int"> 0 </data>
<data name="kfc_qmap" type="int"> 0 </data>
<data name="qmi_pc" type="int"> 0 </data>
<data name="kfc_mode" type="int"> 4 </data>
<data name="kfc_qmap" type="int"> 1 </data>
<data name="qmi_pc" type="int"> 1 </data>
<data name="tcp_ack_prio" type="int"> 1 </data>
<data name="netmgr_listen_ev_proto" type="int"> 1 </data>
@@ -3251,13 +3252,13 @@
<data name="dataformat_ul_data_aggregation_protocol" type="int"> 9 </data>
<data name="dataformat_dl_gro_enabled" type="int"> 1 </data>
<data name="dataformat_ul_gso_enabled" type="int"> 1 </data>
<data name="rsc" type="int"> 0 </data>
<data name="rsb" type="int"> 0 </data>
<data name="rsc" type="int"> 2 </data>
<data name="rsb" type="int"> 2 </data>
<data name="phys_net_dev" type="string"> rmnet_ipa0 </data>
<data name="rtm_rmnet_data_enabled" type="int"> 1 </data>
<data name="rmnet_offload" type="int"> 0 </data>
<data name="rmnet_shs" type="int"> 0 </data>
<data name="uplink_priority" type="int"> 0 </data>
<data name="rmnet_offload" type="int"> 1 </data>
<data name="rmnet_shs" type="int"> 1 </data>
<data name="uplink_priority" type="int"> 1 </data>
<data name="iwlan_concurrency" type="int"> 1 </data>
<data name="nl_xfrm" type="int"> 1 </data>
<data name="netdev_max_backlog" type="int"> 100000 </data>
@@ -3366,4 +3367,234 @@
<!-- Number of above reverse data ports inited on bootup -->
<data name="static_rev_links" type="int"> 4 </data>
</listitem>
<!-- monaco parameters -->
<listitem name = "monaco">
<data name="qmi_dpm_enabled" type="int"> 1 </data>
<data name="use_qmuxd" type="int"> 0 </data>
<data name="dpm_retry_timeout" type="int"> 10000 </data>
<data name="wda_data_format_enabled" type="int"> 1 </data>
<data name="kfc_mode" type="int"> 0 </data>
<data name="kfc_qmap" type="int"> 0 </data>
<data name="qmi_pc" type="int"> 0 </data>
<data name="netmgr_listen_ev_proto" type="int"> 1 </data>
<data name="single_qmux_ch_enabled" type="int"> 1 </data>
<data name="single_qmux_ch_conn_id_str" type="string"> rmnet0 </data>
<data name="single_qmux_ch_name" type="string"> DATA5_CNTL </data>
<data name="tc_ul_baserate" type="int"> 155000000 </data>
<data name="dynamic_tc_ul_baserate" type="int"> 1 </data>
<data name="tc_ul_burst" type="int"> 25000 </data>
<data name="rmnet_data_enabled" type="int"> 1 </data>
<data name="dataformat_agg_dl_pkt" type="int"> 10 </data>
<data name="dataformat_agg_dl_size" type="int"> 8192 </data>
<data name="dataformat_agg_ul_pkt" type="int"> 0 </data>
<data name="dataformat_agg_ul_size" type="int"> 0 </data>
<data name="dataformat_agg_ul_time" type="int"> 0 </data>
<data name="dataformat_agg_ul_features" type="int"> 0 </data>
<data name="dataformat_dl_data_aggregation_protocol" type="int"> 8 </data>
<data name="dataformat_ul_data_aggregation_protocol" type="int"> 8 </data>
<data name="dataformat_dl_gro_enabled" type="int"> 1 </data>
<data name="dataformat_ul_gso_enabled" type="int"> 1 </data>
<data name="rsc" type="int"> 0 </data>
<data name="rsb" type="int"> 0 </data>
<data name="phys_net_dev" type="string"> rmnet_ipa0 </data>
<data name="rtm_rmnet_data_enabled" type="int"> 1 </data>
<data name="rmnet_offload" type="int"> 0 </data>
<data name="rmnet_shs" type="int"> 0 </data>
<data name="uplink_priority" type="int"> 0 </data>
<data name="iwlan_concurrency" type="int"> 1 </data>
<data name="nl_xfrm" type="int"> 1 </data>
<data name="netdev_max_backlog" type="int"> 10000 </data>
<data name="rtnetlink_tc_enabled" type="int"> 1 </data>
<data name="debug_netdev_max_backlog" type="int"> 1500 </data>
<data name="disable_tcp_hystart_detect" type="int"> 1 </data>
<data name="disable_hystart" type="int"> 1 </data>
<data name="initial_ssthresh" type="int"> 1400 </data>
<data name="dl_marker_enabled" type="int"> 0 </data>
<data name="pnd_rps_mask" type="int"> 2 </data>
<data name="vnd_rps_mask" type="int"> 12 </data>
<data name="qos_via_idl" type="int"> 1 </data>
<data name="max_mtu" type="int"> 9216 </data>
<data name="netmgr_recovery_enabled" type="int"> 1 </data>
<data name="num_modems" type="int"> 2 </data>
<list name="modems_enabled">
<data type="int"> 1 </data> <!-- MODEM_MSM -->
<data type="int"> 0 </data> <!-- MODEM_MDM -->
</list>
<data name="control_ports_len" type="int"> 11 </data>
<list name="control_ports">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<data name="data_ports_len" type="int"> 11 </data>
<list name="data_ports">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<!-- Number of above data ports inited on bootup -->
<data name="static_fwd_links" type="int"> 6 </data>
<!-- iWLAN ports -->
<data name="iwlan_enable" type="int"> 1 </data>
<data name="rev_control_ports_len" type="int"> 9 </data>
<list name="rev_control_ports">
<data type="string"> r_rmnet_data0 </data>
<data type="string"> r_rmnet_data1 </data>
<data type="string"> r_rmnet_data2 </data>
<data type="string"> r_rmnet_data3 </data>
<data type="string"> r_rmnet_data4 </data>
<data type="string"> r_rmnet_data5 </data>
<data type="string"> r_rmnet_data6 </data>
<data type="string"> r_rmnet_data7 </data>
<data type="string"> r_rmnet_data8 </data>
</list>
<data name="rev_data_ports_len" type="int"> 9 </data>
<list name="rev_data_ports">
<data type="string"> r_rmnet_data0 </data>
<data type="string"> r_rmnet_data1 </data>
<data type="string"> r_rmnet_data2 </data>
<data type="string"> r_rmnet_data3 </data>
<data type="string"> r_rmnet_data4 </data>
<data type="string"> r_rmnet_data5 </data>
<data type="string"> r_rmnet_data6 </data>
<data type="string"> r_rmnet_data7 </data>
<data type="string"> r_rmnet_data8 </data>
</list>
<!-- Number of above reverse data ports inited on bootup -->
<data name="static_rev_links" type="int"> 4 </data>
</listitem>
<!-- QTang parameters -->
<listitem name = "qtang">
<data name="qmi_dpm_enabled" type="int"> 1 </data>
<data name="use_qmuxd" type="int"> 0 </data>
<data name="dpm_retry_timeout" type="int"> 10000 </data>
<data name="wda_data_format_enabled" type="int"> 1 </data>
<data name="kfc_mode" type="int"> 4 </data>
<data name="qmi_pc" type="int"> 1 </data>
<data name="netmgr_listen_ev_proto" type="int"> 1 </data>
<data name="single_qmux_ch_enabled" type="int"> 1 </data>
<data name="single_qmux_ch_conn_id_str" type="string"> rmnet0 </data>
<data name="single_qmux_ch_name" type="string"> DATA5_CNTL </data>
<data name="tc_ul_baserate" type="int"> 155000000 </data>
<data name="dynamic_tc_ul_baserate" type="int"> 1 </data>
<data name="tc_ul_burst" type="int"> 25000 </data>
<data name="rmnet_data_enabled" type="int"> 1 </data>
<data name="dataformat_agg_dl_pkt" type="int"> 10 </data>
<data name="dataformat_agg_dl_size" type="int"> 8192 </data>
<data name="dataformat_agg_ul_pkt" type="int"> 0 </data>
<data name="dataformat_agg_ul_size" type="int"> 0 </data>
<data name="dataformat_dl_data_aggregation_protocol" type="int"> 8 </data>
<data name="dataformat_ul_data_aggregation_protocol" type="int"> 8 </data>
<data name="dataformat_dl_gro_enabled" type="int"> 1 </data>
<data name="dataformat_ul_gso_enabled" type="int"> 1 </data>
<data name="phys_net_dev" type="string"> rmnet_ipa0 </data>
<data name="rtm_rmnet_data_enabled" type="int"> 1 </data>
<data name="rtnetlink_tc_enabled" type="int"> 1 </data>
<data name="netdev_max_backlog" type="int"> 10000 </data>
<data name="disable_tcp_hystart_detect" type="int"> 1 </data>
<data name="disable_hystart" type="int"> 1 </data>
<data name="initial_ssthresh" type="int"> 1400 </data>
<data name="pnd_rps_mask" type="int"> 2 </data>
<data name="vnd_rps_mask" type="int"> 12 </data>
<data name="netdev_budget" type="int"> 0 </data>
<data name="tcp_mtu_probing" type="int"> 2 </data>
<data name="qos_via_idl" type="int"> 1 </data>
<data name="skip_buffered_qos_modify" type="int"> 1 </data>
<data name="num_modems" type="int"> 2 </data>
<list name="modems_enabled">
<data type="int"> 1 </data> <!-- MODEM_MSM -->
<data type="int"> 0 </data> <!-- MODEM_MDM -->
</list>
<data name="control_ports_len" type="int"> 11 </data>
<list name="control_ports">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<data name="data_ports_len" type="int"> 11 </data>
<list name="data_ports">
<data type="string"> rmnet_data0 </data>
<data type="string"> rmnet_data1 </data>
<data type="string"> rmnet_data2 </data>
<data type="string"> rmnet_data3 </data>
<data type="string"> rmnet_data4 </data>
<data type="string"> rmnet_data5 </data>
<data type="string"> rmnet_data6 </data>
<data type="string"> rmnet_data7 </data>
<data type="string"> rmnet_data8 </data>
<data type="string"> rmnet_data9 </data>
<data type="string"> rmnet_data10 </data>
</list>
<!-- iWLAN ports -->
<data name="iwlan_enable" type="int"> 1 </data>
<data name="rev_control_ports_len" type="int"> 9 </data>
<list name="rev_control_ports">
<data type="string"> r_rmnet_data0 </data>
<data type="string"> r_rmnet_data1 </data>
<data type="string"> r_rmnet_data2 </data>
<data type="string"> r_rmnet_data3 </data>
<data type="string"> r_rmnet_data4 </data>
<data type="string"> r_rmnet_data5 </data>
<data type="string"> r_rmnet_data6 </data>
<data type="string"> r_rmnet_data7 </data>
<data type="string"> r_rmnet_data8 </data>
</list>
<data name="rev_data_ports_len" type="int"> 9 </data>
<list name="rev_data_ports">
<data type="string"> r_rmnet_data0 </data>
<data type="string"> r_rmnet_data1 </data>
<data type="string"> r_rmnet_data2 </data>
<data type="string"> r_rmnet_data3 </data>
<data type="string"> r_rmnet_data4 </data>
<data type="string"> r_rmnet_data5 </data>
<data type="string"> r_rmnet_data6 </data>
<data type="string"> r_rmnet_data7 </data>
<data type="string"> r_rmnet_data8 </data>
</list>
</listitem>
</list>
+61
View File
@@ -0,0 +1,61 @@
<!--
Copyright (c) 2017 Qualcomm Technologies, Inc.
All Rights Reserved.
Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<!--
This file is configured by OEM to customize the path used by GP FS listener
service to save files, and will be located in /vendor/etc on device
"gp_data_path" and "gp_persist_path" are the /data and /persist partition
path to save files, respectively.
By default, "gp_data_path" is "/data/vendor/tzstorage/", and
"gp_persist_path" is "/mnt/vendor/persist/data/".
To replace with different paths, please also create folder in init.qcom.rc
file and update SEAndroid policy.
Take "/data/vendor/tzstorage/" as an example below,
A) rootdir/etc/init.qcom.rc:
# Create /data/vendor/tzstorage directory for SFS listener
mkdir /data/vendor/tzstorage 0770 system system
B) common/file.te:
# SFS listener data file
type data_tzstorage_file, file_type, data_file_type;
C) common/file_contexts:
/data/vendor/tzstorage(/.*)? u:object_r:data_tzstorage_file:s0
D) common/qseecomd.te:
# Allow SFS to write to data partition
allow tee data_tzstorage_file:dir create_dir_perms;
allow tee data_tzstorage_file:file create_file_perms;
"gp_whitelist_count" and "gp_whitelist_path"
Some paths needs "/data/vendor/tzstorage" appended to it at the beginning
as they do not have access/permissions on their own.
Use gp_whitelist_count and gp_whitelist_paths entries to add more such paths.
By default, we add "/data/system/users" and "/data/misc/qsee" for current use
cases.
To add an extra path, increment the count in gp_whitelist_count and add a new
gp_whitelist_path entry. It is very critical that the count matches with the
number of path entries.
-->
<sfs_path>
<gp_data_path> /data/vendor/tzstorage/ </gp_data_path>
<gp_persist_path> /mnt/vendor/persist/data/ </gp_persist_path>
<gp_whitelist_count> 4 </gp_whitelist_count>
<gp_whitelist_path> /data/system/users/ </gp_whitelist_path>
<gp_whitelist_path> /data/misc/qsee/ </gp_whitelist_path>
<gp_whitelist_path> /qwes </gp_whitelist_path>
<gp_whitelist_path> /qwes/licenses </gp_whitelist_path>
</sfs_path>
+2 -5
View File
@@ -12,11 +12,8 @@ on boot
write /proc/sys/net/core/rmem_max 16777216
write /proc/sys/net/core/wmem_max 8388608
#Load rmnet_core driver
exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d /vendor/lib/modules rmnet_ctl
exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d /vendor/lib/modules rmnet_core
exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d /vendor/lib/modules/5.4-gki rmnet_ctl
exec u:r:vendor_modprobe:s0 -- /vendor/bin/modprobe -a -d /vendor/lib/modules/5.4-gki rmnet_core
# Start netmgrd
start vendor.netmgrd
# msm specific files that need to be created on /data
on post-fs-data
-4
View File
@@ -1,10 +1,6 @@
on boot
mkdir /dev/socket/qcrild 0750 radio radio
service vendor.qcrild /vendor/bin/hw/qcrild
class main
user radio
disabled
group radio cache inet misc audio log readproc wakelock oem_2901
capabilities BLOCK_SUSPEND NET_ADMIN NET_RAW
@@ -1,6 +0,0 @@
service dms-hal-2-0 /vendor/bin/hw/vendor.dolby.hardware.dms@2.0-service
class hal
user media
group audio media
on post-fs-data
mkdir /data/vendor/dolby 0770 media media
@@ -1,13 +0,0 @@
# @file vendor.qti.hardware.perf@2.2-service.rc
# @brief Defination perf service
#
# DESCRIPTION
# ---------------------------------------------------------------------------
# Copyright (c) 2019-2020 Qualcomm Technologies, Inc.
# All Rights Reserved.
# Confidential and Proprietary - Qualcomm Technologies, Inc.
# ---------------------------------------------------------------------------
service perf-hal-2-2 /vendor/bin/hw/vendor.qti.hardware.perf@2.2-service
class hal
user root
group root readproc oem_2907
@@ -1,14 +0,0 @@
#
# Copyright (c) 2019 Qualcomm Technologies, Inc.
# All Rights Reserved.
# Confidential and Proprietary - Qualcomm Technologies, Inc.
#
#
on init
start qseecom-service
service qseecom-service /vendor/bin/hw/vendor.qti.hardware.qseecom@1.0-service
class hal
user system
group system drmrpc
@@ -0,0 +1,4 @@
service tui_comm-1-0 /vendor/bin/hw/vendor.qti.hardware.tui_comm@1.0-service-qti
class hal
user system
group system drmrpc
-57
View File
@@ -1,57 +0,0 @@
<?xml version="1.0" encoding="utf-8" ?>
<!-- Copyright 2016 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
This file was modified by Dolby Laboratories, Inc. The portions of the
code that are surrounded by "DOLBY..." are copyrighted and
licensed separately, as follows:
(C) 2018 Dolby Laboratories, Inc.
All rights reserved.
This program is protected under international and U.S. Copyright laws as
an unpublished work. This program is confidential and proprietary to the
copyright owners. Reproduction or disclosure, in whole or in part, or the
production of derivative works therefrom without the express permission of
the copyright owners is prohibited.
-->
<Included>
<Decoders>
<!-- DOLBY_UDC -->
<MediaCodec name="OMX.dolby.ac3.decoder" type="audio/ac3">
<Limit name="channel-count" max="6" />
<Limit name="sample-rate" ranges="32000,44100,48000" />
<Limit name="bitrate" range="32000-640000" />
</MediaCodec>
<MediaCodec name="OMX.dolby.eac3.decoder" type="audio/eac3">
<Limit name="channel-count" max="8" />
<Limit name="sample-rate" ranges="32000,44100,48000" />
<Limit name="bitrate" range="32000-6144000" />
</MediaCodec>
<MediaCodec name="OMX.dolby.eac3-joc.decoder" type="audio/eac3-joc">
<Limit name="channel-count" max="8" />
<Limit name="sample-rate" ranges="48000" />
<Limit name="bitrate" range="32000-6144000" />
</MediaCodec>
<!-- DOLBY_UDC END -->
<!-- DOLBY_AC4 -->
<MediaCodec name="OMX.dolby.ac4.decoder" type="audio/ac4">
<Limit name="channel-count" max="2" />
<Limit name="sample-rate" ranges="48000" />
<Limit name="bitrate" range="16000-2688000" />
</MediaCodec>
<!-- DOLBY_AC4 END -->
</Decoders>
</Included>
-299
View File
@@ -1,299 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
* Copyright (c) 2017 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<!-- Supported XML tags with their fields.
* Major tag supports OpcodeValue.
* Minor tag supports OpcodeValue, Nodepath and Supported(Optional) fields.
* By default, all the resources are assumed as supported.
Supported field can be used to mark a resource as not supported.
* All the interactive nodes, ondemand nodes and some nodes of sched major
group which aren't being used are marked as Not supported by default and
can be enabled by using the target specific config files. -->
<!-- For resources which update multiple nodes or which require speical
acquire/release funcitons, need to mention the keyword SPECIAL_NODE
in their node path field and accordingly their ApplyOts and ResetOpts
functions need to be defined in the code.-->
<!-- For adding a new resource, a new minor tag with all mandatory fields
need to be added just before the end of it's major group. -->
<ResourceConfigs>
<PerfResources>
<!-- display off major start -->
<Major OpcodeValue="0x0" />
<Minor OpcodeValue="0x0" Node="SPECIAL_NODE - display_off" />
<!-- display off major end -->
<!-- power collapse major start -->
<Major OpcodeValue="0x1" />
<Minor OpcodeValue="0x0" Node="/dev/cpu_dma_latency" />
<Minor OpcodeValue="0x1" Node="/sys/module/lpm_levels/system/perf/perf-l2-pc/idle_enabled" />
<Minor OpcodeValue="0x2" Node="/sys/module/lpm_levels/parameters/bias_hyst" />
<Minor OpcodeValue="0x3" Node="/sys/module/lpm_levels/parameters/ref_stddev" />
<Minor OpcodeValue="0x4" Node="/sys/module/lpm_levels/parameters/tmr_add" />
<Minor OpcodeValue="0x5" Node="/sys/module/lpm_levels/parameters/lpm_ipi_prediction" Supported="no" />
<!-- power collapse major end -->
<!-- cpufreq major start -->
<Major OpcodeValue="0x2" />
<Minor OpcodeValue="0x0" Node="/sys/module/msm_performance/parameters/cpu_min_freq" />
<Minor OpcodeValue="0x1" Node="/sys/module/msm_performance/parameters/cpu_max_freq" />
<!-- cpufreq major end -->
<!-- sched major start -->
<Major OpcodeValue="0x3" />
<!--Sysfsnode paths may change basing on the target for minors 0x1, 0x4, 0x5, 0x9.
So, for targets with different node paths than default, need to be specified
in the target specific resource config xml file. -->
<Minor OpcodeValue="0x0" Node="/proc/sys/kernel/sched_boost" />
<Minor OpcodeValue="0x1" Node="/proc/sys/kernel/sched_prefer_idle" Supported="no" />
<Minor OpcodeValue="0x2" Node="/proc/sys/kernel/sched_migration_cost_ns" />
<Minor OpcodeValue="0x3" Node="/proc/sys/kernel/sched_small_task" />
<Minor OpcodeValue="0x4" Node="/proc/sys/kernel/sched_mostly_idle_load" Supported="no" />
<Minor OpcodeValue="0x5" Node="/proc/sys/kernel/sched_mostly_idle_nr_run" Supported="no" />
<Minor OpcodeValue="0x6" Node="/proc/sys/kernel/sched_init_task_load" />
<Minor OpcodeValue="0x7" Node="/proc/sys/kernel/sched_upmigrate" />
<Minor OpcodeValue="0x8" Node="/proc/sys/kernel/sched_downmigrate" />
<Minor OpcodeValue="0x9" Node="/proc/sys/kernel/sched_mostly_idle_freq" Supported="no" />
<Minor OpcodeValue="0xA" Node="SPECIAL_NODE - sched_add_group" />
<Minor OpcodeValue="0xB" Node="/proc/sys/kernel/sched_spill_nr_run" />
<Minor OpcodeValue="0xC" Node="/sys/devices/system/cpu/cpu0/sched_static_cpu_pwr_cost" />
<Minor OpcodeValue="0xD" Node="/proc/sys/kernel/sched_restrict_cluster_spill" />
<Minor OpcodeValue="0xE" Node="SPECIAL_NODE - sched_freq_add_group" />
<Minor OpcodeValue="0xF" Node="/dev/cpuset/top-app/cpus" />
<Minor OpcodeValue="0x10" Node="/dev/cpuset/foreground/cpus" />
<Minor OpcodeValue="0x11" Node="/dev/cpuset/system-background/cpus" />
<Minor OpcodeValue="0x12" Node="/dev/cpuset/background/cpus" />
<Minor OpcodeValue="0x13" Node="/proc/sys/kernel/sched_freq_aggregate" />
<Minor OpcodeValue="0x14" Node="/proc/sys/kernel/sched_enable_thread_grouping" />
<Minor OpcodeValue="0x15" Node="/proc/sys/kernel/sched_group_upmigrate" />
<Minor OpcodeValue="0x16" Node="/proc/sys/kernel/sched_group_downmigrate" />
<!-- sched_freq_aggr_threshold perflock will have contention with sched_boost level 3,
so disable this resource for the target which is going to use sched boost 3 level.-->
<Minor OpcodeValue="0x17" Node="/proc/sys/kernel/sched_freq_aggregate_threshold" />
<Minor OpcodeValue="0x18" Node="/dev/stune/top-app/schedtune.prefer_idle" />
<Minor OpcodeValue="0x19" Node="/proc/sys/kernel/sched_initial_task_util" />
<Minor OpcodeValue="0x1A" Node="/sys/devices/system/cpu/cpu0/sched_load_boost" />
<Minor OpcodeValue="0x1B" Node="/proc/sys/kernel/sched_little_cluster_coloc_fmin_khz" />
<Minor OpcodeValue="0x1C" Node="/dev/stune/top-app/schedtune.boost" />
<Minor OpcodeValue="0x1D" Node="/proc/sys/kernel/sched_busy_hysteresis_enable_cpus" />
<Minor OpcodeValue="0x1E" Node="/proc/sys/kernel/sched_min_task_util_for_colocation" />
<Minor OpcodeValue="0x1F" Node="/proc/sys/kernel/sched_min_task_util_for_boost" />
<Minor OpcodeValue="0x20" Node="/proc/%d/sched_boost" Supported="yes"/> <!-- sched_task_boost -->
<Minor OpcodeValue="0x21" Node="/proc/sys/kernel/sched_user_hint" /> <!--sched_user_hint -->
<Minor OpcodeValue="0x22" Node="/proc/sys/kernel/sched_task_unfilter_nr_windows" /> <!--sched_task_unfilter_nr_windows -->
<Minor OpcodeValue="0x23" Node="/proc/sys/kernel/sched_coloc_downmigrate_ns" /> <!--sched_coloc_downmigrate_ns -->
<Minor OpcodeValue="0x24" Node="/proc/sys/kernel/sched_coloc_busy_hysteresis_enable_cpus" />
<Minor OpcodeValue="0x25" Node="/proc/sys/kernel/sched_coloc_busy_hyst_ns" />
<Minor OpcodeValue="0x26" Node="/proc/sys/kernel/sched_window_stats_policy" />
<Minor OpcodeValue="0x27" Node="/proc/sys/kernel/sched_many_wakeup_threshold" />
<Minor OpcodeValue="0x28" Node="/proc/sys/kernel/sched_sync_hint_enable" />
<Minor OpcodeValue="0x29" Node="/proc/sys/kernel/sched_ravg_window_nr_ticks" />
<Minor OpcodeValue="0x2A" Node="/proc/sys/kernel/sched_prefer_spread" />
<Minor OpcodeValue="0x2B" Node="/dev/cpuctl/top-app/cpu.uclamp.min" />
<Minor OpcodeValue="0x2C" Node="/proc/%d/sched_boost" Supported="yes" /> <!-- enable sched_task_boost for top-app render thread-->
<Minor OpcodeValue="0x2D" Node="/proc/%d/sched_boost" Supported="yes" /> <!-- disable sched_task_boost for top-app render thread-->
<Minor OpcodeValue="0x2E" Node="/proc/sys/walt/sched_task_unfilter_period" />
<Minor OpcodeValue="0x2F" Node="/proc/sys/walt/sched_conservative_pl" />
<Minor OpcodeValue="0x30" Node="/proc/sys/walt/sched_coloc_busy_hyst_cpu_busy_pct" />
<Minor OpcodeValue="0x31" Node="/proc/sys/walt/sched_coloc_busy_hyst_cpu_ns" />
<Minor OpcodeValue="0x32" Node="/proc/sys/kernel/walt_rtg_cfs_boost_prio" />
<Minor OpcodeValue="0x33" Node="/proc/sys/kernel/sched_force_lb_enable" Supported="yes" />
<Minor OpcodeValue="0x34" Node="/proc/%d/sched_low_latency" Supported="yes" />
<Minor OpcodeValue="0x35" Node="/proc/sys/kernel/sched_min_granularity_ns" />
<Minor OpcodeValue="0x36" Node="/proc/sys/kernel/walt_low_latency_task_threshold" />
<Minor OpcodeValue="0x37" Node="/dev/stune/foreground/schedtune.prefer_idle" />
<Minor OpcodeValue="0x38" Node="/proc/sys/kernel/%s" Supported="no"/>
<Minor OpcodeValue="0x39" Node="/dev/stune/top-app/schedtune.colocate" Supported="no" />
<Minor OpcodeValue="0x3A" Node="/dev/cpuctl/top-app/cpu.uclamp.latency_sensitive" />
<Minor OpcodeValue="0x3B" Node="/dev/cpuctl/foreground/cpu.uclamp.latency_sensitive" />
<Minor OpcodeValue="0x3D" Node="/proc/sys/kernel/%s" Supported="no"/>
<!-- sched major end -->
<!-- core hotplug major start -->
<Major OpcodeValue="0x4" />
<Minor OpcodeValue="0x0" Node="SPECIAL_NODE - lock_min_cores" />
<Minor OpcodeValue="0x1" Node="SPECIAL_NODE - lock_max_cores" />
<!-- core hotplug major end-->
<!-- interactive major start -->
<Major OpcodeValue="0x5" />
<!-- For following minors node paths might change basing on GovInstanceType and
Supported field might change basing on the type of CpufreqGov.-->
<Minor OpcodeValue="0x0" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/above_hispeed_delay" Supported="no" />
<Minor OpcodeValue="0x1" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/boost" Supported="no" />
<Minor OpcodeValue="0x2" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/boostpulse" Supported="no" />
<Minor OpcodeValue="0x3" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/boostpulse_duration" Supported="no" />
<Minor OpcodeValue="0x4" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/go_hispeed_load" Supported="no" />
<Minor OpcodeValue="0x5" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/hispeed_freq" Supported="no" />
<Minor OpcodeValue="0x6" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/io_is_busy" Supported="no" />
<Minor OpcodeValue="0x7" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/min_sample_time" Supported="no" />
<Minor OpcodeValue="0x8" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/target_loads" Supported="no" />
<Minor OpcodeValue="0x9" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/timer_rate" Supported="no" />
<Minor OpcodeValue="0xA" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/timer_slack" Supported="no" />
<Minor OpcodeValue="0xB" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/max_freq_hysteresis" Supported="no" />
<Minor OpcodeValue="0xC" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/use_sched_load" Supported="no" />
<Minor OpcodeValue="0xD" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/use_migration_notif" Supported="no" />
<Minor OpcodeValue="0xE" Node="/sys/devices/system/cpu/cpu0/cpufreq/interactive/ignore_hispeed_on_notif" Supported="no" />
<Minor OpcodeValue="0xF" Node="/sys/devices/system/cpu/cpu0/cpufreq/schedutil/hispeed_freq" />
<Minor OpcodeValue="0x10" Node="/sys/devices/system/cpu/cpu0/cpufreq/schedutil/hispeed_load" />
<Minor OpcodeValue="0x11" Node="/sys/devices/system/cpu/cpu0/cpufreq/schedutil/pl" />
<Minor OpcodeValue="0x12" Node="/sys/devices/system/cpu/cpu0/cpufreq/schedutil/down_rate_limit_us" />
<Minor OpcodeValue="0x13" Node="/sys/devices/system/cpu/cpu0/cpufreq/schedutil/rtg_boost_freq" />
<!-- interactive major end -->
<!-- cpubw hwmon major start -->
<Major OpcodeValue="0x6" />
<!-- ALl the following minors might change based on target. -->
<Minor OpcodeValue="0x0" Node="/sys/class/devfreq/soc:qcom,cpubw/min_freq" />
<Minor OpcodeValue="0x1" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/decay_rate" />
<Minor OpcodeValue="0x2" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0x3" Node="SPECIAL_NODE - cpubw_hwmon_hyst_opt" />
<Minor OpcodeValue="0x4" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/low_power_ceil_mbps" />
<Minor OpcodeValue="0x5" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/low_power_io_percent" />
<Minor OpcodeValue="0x6" Node="/sys/class/devfreq/soc:qcom,cpubw/max_freq" />
<Minor OpcodeValue="0x7" Node="/sys/class/devfreq/soc:qcom,cpubw/polling_interval" />
<Minor OpcodeValue="0x8" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/sample_ms" />
<Minor OpcodeValue="0x9" Node="/sys/class/devfreq/soc:qcom,cpubw/bw_hwmon/idle_mbps" />
<!--Here onwards are the path for new opcodes to mark CPU_LLCC_BW nodes.Upper ones
of this major are marked as unsupported for the tergets using the new opcodes-->
<Minor OpcodeValue="0xA" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/min_freq" />
<Minor OpcodeValue="0xB" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon/up_scale" />
<Minor OpcodeValue="0xC" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon/use_ab" />
<Minor OpcodeValue="0xD" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0xE" Node="SPECIAL_NODE - llcbw_hwmon_hyst_opt" />
<Minor OpcodeValue="0xF" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon/sample_ms" />
<Minor OpcodeValue="0x10" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-llcc-bw/polling_interval" />
<Minor OpcodeValue="0x11" Node="/sys/devices/system/cpu/bus_dcvs/LLCC/190b6400.qcom,bwmon-llcc/min_freq" />
<Minor OpcodeValue="0x12" Node="/sys/devices/system/cpu/bus_dcvs/LLCC/190b6400.qcom,bwmon-llcc/max_freq" />
<!-- cpubw hwmon major end -->
<!-- video major start -->
<Major OpcodeValue="0x7" />
<Minor OpcodeValue="0x0" Node="SPECIAL_NODE - handle_vid_encplay_hint" />
<Minor OpcodeValue="0x1" Node="SPECIAL_NODE - handle_vid_decplay_hint" />
<Minor OpcodeValue="0x2" Node="SPECIAL_NODE - handle_disp_hint" />
<!-- video major end -->
<!-- ksm major start -->
<Major OpcodeValue="0x8" />
<Minor OpcodeValue="0x0" Node="SPECIAL_NODE - disable_ksm" />
<Minor OpcodeValue="0x1" Node="SPECIAL_NODE - set_ksm_param" />
<!-- ksm major end -->
<!-- ondemand major start -->
<Major OpcodeValue="0x9" />
<Minor OpcodeValue="0x0" Node="/sys/devices/system/cpu/cpufreq/ondemand/sampling_rate" Supported="no" />
<Minor OpcodeValue="0x1" Node="/sys/devices/system/cpu/cpufreq/ondemand/io_is_busy" Supported="no" />
<Minor OpcodeValue="0x2" Node="/sys/devices/system/cpu/cpufreq/ondemand/sampling_down_factor" Supported="no" />
<Minor OpcodeValue="0x3" Node="/sys/devices/system/cpu/cpufreq/ondemand/sync_freq" Supported="no" />
<Minor OpcodeValue="0x4" Node="/sys/devices/system/cpu/cpufreq/ondemand/optimal_freq" Supported="no" />
<Minor OpcodeValue="0x5" Node="/sys/devices/system/cpu/cpufreq/ondemand/enable_stepup" Supported="no" />
<Minor OpcodeValue="0x6" Node="/sys/devices/system/cpu/cpufreq/ondemand/max_intermediate_steps" Supported="no" />
<Minor OpcodeValue="0x7" Node="/dev/cpuctl/cpu.notify_on_migrate" Supported="no" />
<!-- ondemand major end -->
<!-- gpu major start -->
<Major OpcodeValue="0xA" />
<Minor OpcodeValue="0x0" Node="/sys/class/kgsl/kgsl-3d0/default_pwrlevel" />
<Minor OpcodeValue="0x1" Node="/sys/class/kgsl/kgsl-3d0/min_pwrlevel" />
<Minor OpcodeValue="0x2" Node="/sys/class/kgsl/kgsl-3d0/max_pwrlevel" />
<Minor OpcodeValue="0x3" Node="/sys/class/kgsl/kgsl-3d0/devfreq/min_freq" />
<Minor OpcodeValue="0x4" Node="/sys/class/kgsl/kgsl-3d0/devfreq/max_freq" />
<Minor OpcodeValue="0x5" Node="/sys/class/devfreq/soc:qcom,gpubw/min_freq" />
<Minor OpcodeValue="0x6" Node="/sys/class/devfreq/soc:qcom,gpubw/max_freq" />
<Minor OpcodeValue="0x7" Node="SPECIAL_NODE - gpu_disable_gpu_nap" />
<Minor OpcodeValue="0x8" Node="/sys/class/kgsl/kgsl/proc/%d/state" />
<Minor OpcodeValue="0x9" Node="/sys/class/kgsl/kgsl/proc/%d/state" />
<Minor OpcodeValue="0xA" Node="/sys/class/kgsl/kgsl-3d0/devfreq/mod_percent" />
<!-- gpu major end -->
<!-- misc major start -->
<Major OpcodeValue="0xB" />
<Minor OpcodeValue="0x0" Node="SPECIAL_NODE - unsupported" />
<Minor OpcodeValue="0x1" Node="SPECIAL_NODE - irq_balancer" />
<Minor OpcodeValue="0x2" Node="/sys/module/cpu_boost/parameters/input_boost_freq" />
<Minor OpcodeValue="0x3" Node="/proc/sys/vm/swap_ratio" />
<Minor OpcodeValue="0x4" Node="StorageNode_path_is_figured_out_based_on_the_target_device" />
<Minor OpcodeValue="0x5" Node="SPECIAL_NODE - dummy_or_keep_alive" />
<Minor OpcodeValue="0x6" Node="/sys/module/process_reclaim/parameters/enable_process_reclaim" />
<Minor OpcodeValue="0x7" Node="SPECIAL_NODE - disable_pasr" />
<!-- misc major end -->
<!-- llcbw hwmon major start -->
<Major OpcodeValue="0xC" />
<!-- ALl the following minors node path might change based on target. -->
<Minor OpcodeValue="0x0" Node="/sys/class/devfreq/soc:qcom,llccbw/min_freq" />
<Minor OpcodeValue="0x1" Node="/sys/class/devfreq/soc:qcom,llccbw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0x2" Node="SPECIAL_NODE - llcbw_hwmon_hyst_opt" />
<Minor OpcodeValue="0x3" Node="/sys/class/devfreq/soc:qcom,llccbw/bw_hwmon/sample_ms" />
<!--Here onwards are the path for new opcodes to mark LLCC_DDR_BW nodes.Upper ones
of this major are marked as unsupported for the tergets using the new opcodes-->
<Minor OpcodeValue="0x4" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/min_freq" />
<Minor OpcodeValue="0x5" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/up_scale" />
<Minor OpcodeValue="0x6" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/max_freq" />
<Minor OpcodeValue="0x7" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/decay_rate" />
<Minor OpcodeValue="0x8" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0x9" Node="SPECIAL_NODE - cpubw_hwmon_hyst_opt" />
<Minor OpcodeValue="0xA" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/low_power_ceil_mbps" />
<Minor OpcodeValue="0xB" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/low_power_io_percent" />
<Minor OpcodeValue="0xC" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/polling_interval" />
<Minor OpcodeValue="0xD" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/sample_ms" />
<Minor OpcodeValue="0xE" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/idle_mbps" />
<Minor OpcodeValue="0xF" Node="/sys/devices/system/cpu/bus_dcvs/DDR/19091000.qcom,bwmon-ddr/min_freq" />
<Minor OpcodeValue="0x10" Node="/sys/devices/system/cpu/bus_dcvs/DDR/19091000.qcom,bwmon-ddr/max_freq" />
<Minor OpcodeValue="0x11" Node="/sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/bw_hwmon/use_ab" />
<!-- llcbw hwmon major end -->
<!-- memlat major start -->
<Major OpcodeValue="0xD" />
<!-- ALl the following minors node path might change based on target. -->
<Minor OpcodeValue="0x0" Node="/sys/class/devfreq/soc:qcom,l3-cpu%d/min_freq" />
<Minor OpcodeValue="0x1" Node="/sys/class/devfreq/soc:qcom,memlat-cpu0/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0x2" Node="/sys/class/devfreq/soc:qcom,memlat-cpu4/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0x3" Node="/sys/class/devfreq/soc:qcom,memlat-cpu0/mem_latency/stall_floor" />
<Minor OpcodeValue="0x4" Node="/sys/class/devfreq/soc:qcom,memlat-cpu4/mem_latency/stall_floor" />
<Minor OpcodeValue="0x5" Node="/sys/class/devfreq/soc:qcom,memlat-cpu0/min_freq" />
<Minor OpcodeValue="0x6" Node="/sys/class/devfreq/soc:qcom,memlat-cpu4/min_freq" />
<Minor OpcodeValue="0x7" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-llcc-lat/min_freq" />
<Minor OpcodeValue="0x8" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-llcc-lat/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0x9" Node="/sys/class/devfreq/soc:qcom,cpu4-cpu-llcc-lat/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0xA" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-llcc-lat/mem_latency/stall_floor" />
<Minor OpcodeValue="0xB" Node="/sys/class/devfreq/soc:qcom,cpu4-cpu-llcc-lat/mem_latency/stall_floor" />
<Minor OpcodeValue="0xC" Node="/sys/class/devfreq/soc:qcom,cpu0-llcc-ddr-lat/min_freq" />
<Minor OpcodeValue="0xD" Node="/sys/class/devfreq/soc:qcom,cpu0-llcc-ddr-lat/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0xE" Node="/sys/class/devfreq/soc:qcom,cpu4-llcc-ddr-lat/mem_latency/ratio_ceil" />
<Minor OpcodeValue="0xF" Node="/sys/class/devfreq/soc:qcom,cpu0-llcc-ddr-lat/mem_latency/stall_floor" />
<Minor OpcodeValue="0x10" Node="/sys/class/devfreq/soc:qcom,cpu4-llcc-ddr-lat/mem_latency/stall_floor" />
<Minor OpcodeValue="0x11" Node="/sys/class/devfreq/18321000.qcom,devfreq-l3:qcom,cpu%d-cpu-l3-lat/max_freq" />
<Minor OpcodeValue="0x12" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-ddr-latfloor/min_freq" />
<Minor OpcodeValue="0x13" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-ddr-latfloor/max_freq" />
<Minor OpcodeValue="0x14" Node="/sys/class/devfreq/soc:qcom,cpu0-cpu-llcc-lat/max_freq" />
<Minor OpcodeValue="0x15" Node="/sys/class/devfreq/soc:qcom,cpu0-llcc-ddr-lat/max_freq" />
<Minor OpcodeValue="0x16" Node="/sys/devices/system/cpu/bus_dcvs/L3/soc:qcom,memlat:l3:prime/min_freq" />
<Minor OpcodeValue="0x17" Node="/sys/devices/system/cpu/bus_dcvs/LLCC/soc:qcom,memlat:llcc:silver/min_freq" />
<Minor OpcodeValue="0x18" Node="/sys/devices/system/cpu/bus_dcvs/DDR/soc:qcom,memlat:ddr:silver/min_freq" />
<!-- memlat major end -->
<!-- npu major start -->
<Major OpcodeValue="0xE" />
<!-- ALl the following minors node path might change based on target. -->
<Minor OpcodeValue="0x0" Node="/sys/class/devfreq/soc:qcom,npu-npu-llcc-bw/bw_hwmon/sample_ms" />
<Minor OpcodeValue="0x1" Node="/sys/class/devfreq/soc:qcom,npu-npu-llcc-bw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0x2" Node="SPECIAL_NODE - npu_llcbw_hwmon_hyst_opt" />
<!--Here onwards are the path for new opcodes to mark NPU_LLCC_DDR_BW nodes.-->
<Minor OpcodeValue="0x3" Node="/sys/class/devfreq/soc:qcom,npu-llcc-ddr-bw/bw_hwmon/sample_ms" />
<Minor OpcodeValue="0x4" Node="/sys/class/devfreq/soc:qcom,npu-llcc-ddr-bw/bw_hwmon/io_percent" />
<Minor OpcodeValue="0x5" Node="SPECIAL_NODE - npu_ddr_llcbw_hwmon_hyst_opt" />
<!-- npu major end -->
</PerfResources>
</ResourceConfigs>
-22
View File
@@ -1,22 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
/* Copyright (c) 2021 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
*/
-->
<ResourceConfigs>
<PerfResources>
<SysNode Idx="0x0" Node="/sys/module/msm_performance/parameters/num_clusters" />
<SysNode Idx="0x1" Node="/sys/module/msm_performance/parameters/managed_cpus" />
<SysNode Idx="0x2" Node="/sys/module/msm_performance/parameters/cpu_max_freq" />
<SysNode Idx="0x3" Node="/sys/module/msm_performance/events/cpu_hotplug" />
<SysNode Idx="0x4" Node="/sys/module/msm_performance/parameters/max_cpus" />
<SysNode Idx="0x5" Node="/sys/module/msm_performance/parameters/inst" />
<SysNode Idx="0x6" Node="/sys/module/msm_performance/parameters/splh_notif" />
<SysNode Idx="0x7" Node="/sys/module/msm_performance/notify/gfx_evt" />
<SysNode Idx="0x8" Node="/sys/module/msm_performance/parameters/evnt_gplaf_pid" />
</PerfResources>
</ResourceConfigs>
-475
View File
@@ -1,475 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
/* Copyright (c) 2017 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<!--Ids are used in identifying the boosts, increment ids linearly,
do not modify Ids, or add in between-->
<!--follow the number format rules while specifying number, can be given
in any format-->
<BoostConfigs>
<PerfBoost>
<!--app lauch boost-->
<!-- SCHEDBOOST resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ LITTLE Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value-->
<!-- Type="1", main launch boost of 2sec -->
<Config
Id="0x00001081" Type="1" Enable="true" Timeout="2000" Target="sdm660"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1747,
0x40800100, 1400" />
<Config
Id="0x00001081" Type="1" Enable="true" Timeout="2000" Target="sdm658"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1747,
0x40800100, 1400" />
<!--sdm630,sdm455 app lauch boost-->
<!-- SCHEDBOOST resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ BIG Core resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHED_SPILL_NR_RUN resource opcode, value -->
<!-- SCHED_RESTRICT_CLUSTER_SPILL resource opcode, value -->
<!-- Type="1", main launch boost of 2sec -->
<Config
Id="0x00001081" Type="1" Enable="true" Timeout="2000" Target="sdm630"
Resources="0x40C00000, 0x1, 0x40800000, 1880,
0x40800100, 1720, 0x40C2C000, 1, 0x40C34000, 0" />
<Config
Id="0x00001081" Type="1" Enable="true" Timeout="2000" Target="sdm455"
Resources="0x40C00000, 0x1, 0x40800000, 1880,
0x40800100, 1720, 0x40C2C000, 1, 0x40C34000, 0" />
<!--app lauch boost (disabling packing)-->
<!-- POWER COLLAPSE resource opcode, value-->
<!-- STORAGE CLK SCALING resource opcode, value-->
<!-- Type="2", launch boost for disable packing 1.5sec -->
<Config
Id="0x00001081" Type="2" Enable="true" Timeout="1500" Target="sdm660"
Resources="0x40400000, 0x1, 0x42C10000, 0x1" />
<Config
Id="0x00001081" Type="2" Enable="true" Timeout="1500" Target="sdm658"
Resources="0x40400000, 0x1, 0x42C10000, 0x1" />
<!--sdm630,sdm455 app lauch boost (disabling packing)-->
<!-- POWER COLLAPSE resource opcode, value-->
<!-- Type="2", launch boost for disable packing 1.5sec -->
<Config
Id="0x00001081" Type="2" Enable="true" Timeout="1500" Target="sdm630"
Resources="0x40400000, 0x1" />
<Config
Id="0x00001081" Type="2" Enable="true" Timeout="1500" Target="sdm455"
Resources="0x40400000, 0x1" />
<!-- config_enableLaunchBoostv3-->
<!-- SCHEDBOOST resource opcode, value-->
<!-- SCHED GROUP DOWNMIGRATE resource opcode, value-->
<!-- SCHED GROUP UPMIGRATE resource opcode, value-->
<!-- Type="3", FA launch boost of 15sec -->
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm660" Kernel="4.4"
Resources="0x40C5C000, 50, 0x40C58000, 95, 0x40C54000, 100" />
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm660" Kernel="4.14"
Resources="0x40C58000, 95, 0x40C54000, 100" />
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm660" Kernel="4.19"
Resources="0x40C58000, 95, 0x40C54000, 100" />
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm658"
Resources="0x40C5C000, 50, 0x40C58000, 95, 0x40C54000, 100" />
<!--sdm630,sdm455 config_enableLaunchBoostv3-->
<!-- SCHED FREQ AGGR THRESHOLD resource opcode, value-->
<!-- Type="3", FA launch boost of 15sec -->
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm630"
Resources="0x40C5C000, 80" />
<Config
Id="0x00001081" Type="3" Enable="true" Timeout="15000" Target="sdm455"
Resources="0x40C5C000, 80" />
<!--Vertical Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- ABOVE_HISPEED_DELAY_BIG resource opcode, value-->
<!-- IO_IS_BUSY_BIG resource opcode, value-->
<!-- SCHED FREQ_AGGR_THRH resource opcode,value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="1", Vertical Scroll boost -->
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm658" Resolution="1080p"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm658" Resolution="2560"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<!--sdm660,K4.14 Vertical Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="1", Vertical Scroll boost -->
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--sdm660,K4.19 Vertical Scroll boost-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="1", Vertical Scroll boost -->
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--sdm630,sdm455 Vertical Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHED FREQ_AGGR_THRH resource opcode,value-->
<!-- Type="1", Vertical Scroll boost -->
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm630"
Resources="0x41800000, 0x1C, 0x40800000, 1344, 0x40800100, 600,
0x40C5C000, 80" />
<Config
Id="0x00001080" Type="1" Enable="true" Target="sdm455"
Resources="0x41800000, 0x1C, 0x40800000, 1344, 0x40800100, 600,
0x40C5C000, 80" />
<!--Horizontal Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- ABOVE_HISPEED_DELAY_BIG resource opcode, value-->
<!-- IO_IS_BUSY_BIG resource opcode, value-->
<!-- SCHED FREQ_AGGR_THRH resource opcode,value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="2", Horizontal Scroll boost -->
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm658" Resolution="1080p"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm658" Resolution="2560"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<!--sdm660,K4.14 Horizontal Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="2", Horizontal Scroll boost -->
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--sdm660,K4.19 Horizontal Scroll boost-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="2", Horizontal Scroll boost -->
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="1080p" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm660" Resolution="2560" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--sdm630,sdm455 Horizontal Scroll boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHED FREQ_AGGR_THRH resource opcode,value-->
<!-- Type="2", Horizontal Scroll boost -->
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm630"
Resources="0x41800000, 0x1C, 0x40800000, 1344, 0x40800100, 600,
0x40C5C000, 80" />
<Config
Id="0x00001080" Type="2" Enable="true" Target="sdm455"
Resources="0x41800000, 0x1C, 0x40800000, 1344, 0x40800100, 600,
0x40C5C000, 80" />
<!--Pre-Fling boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- ABOVE_HISPEED_DELAY_BIG resource opcode, value-->
<!-- IO_IS_BUSY_BIG resource opcode, value-->
<!-- SCHED FREQ_AGGR_THRH resource opcode,value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="4", Pre-Fling boost -->
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="1080p" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="2560" Kernel="4.4"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm658" Resolution="1080p"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm658" Resolution="2560"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40, 0x4280C000, 266" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm630"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm455"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2,
0x41400000, 1, 0x41418000, 1, 0x40C5C000, 40" />
<!--sdm660,K4.14 Pre-Fling boost-->
<!-- CPUBW_MIN_FREQ resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="4", Pre-Fling boost -->
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="1080p" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="2560" Kernel="4.14"
Resources="0x41800000, 0x31, 0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--sdm660,K4.19 Pre-Fling boost-->
<!-- CPUBOOST_MIN_FREQ BIG CORE resource opcode, value -->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value -->
<!-- SCHEDBOOST resource opcode, value-->
<!-- GPU MIN-FREQUENCY resource opcode,value-->
<!-- Type="4", Pre-Fling boost -->
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="1080p" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2" />
<Config
Id="0x00001080" Type="4" Enable="true" Timeout="80" Target="sdm660" Resolution="2560" Kernel="4.19"
Resources="0x40800000, 1100, 0x40800100, 1100, 0x40C00000, 2, 0x4280C000, 266" />
<!--MTP boost-->
<!-- SCHEDBOOST resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ LITTLE Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value-->
<!-- STORAGE CLK SCALING resource opcode, value-->
<!-- Type="", MTP boost -->
<Config
Id="0x00001086" Enable="true" Target="sdm660"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1800,
0x40800100, 1400, 0x42C10000, 0x1" />
<Config
Id="0x00001086" Enable="true" Target="sdm658"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1800,
0x40800100, 1400, 0x42C10000, 0x1" />
<Config
Id="0x00001086" Enable="true" Target="sdm630"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1800,
0x40800100, 1400, 0x42C10000, 0x1" />
<Config
Id="0x00001086" Enable="true" Target="sdm455"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000, 1800,
0x40800100, 1400, 0x42C10000, 0x1" />
<!--PackageInstall boost-->
<!-- SCHEDBOOST resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ LITTLE Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value-->
<!-- Type="", Package Install boost -->
<Config
Id="0x00001088" Enable="true" Target="sdm660"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001088" Enable="true" Target="sdm658"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001088" Enable="true" Target="sdm630"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001088" Enable="true" Target="sdm455"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<!--Rotation latency boost-->
<!-- SCHEDBOOST resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MAX_FREQ LITTLE Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ BIG Core resource opcode, value-->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value-->
<!-- Type="", Rotation latency boost -->
<Config
Id="0x00001089" Enable="true" Timeout="1500" Target="sdm660"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001089" Enable="true" Timeout="1500" Target="sdm658"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001089" Enable="true" Timeout="1500" Target="sdm630"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<Config
Id="0x00001089" Enable="true" Timeout="1500" Target="sdm455"
Resources="0x40C00000, 0x1, 0x40804000, 0xFFF, 0x40804100, 0xFFF, 0x40800000,0xFFF,
0x40800100,0xFFF" />
<!--Rotation animation boost-->
<!-- CPUBOOST_MIN_FREQ LITTLE Core resource opcode, value-->
<!-- GPU MIN_FREQUENCY resource opcode,value-->
<!-- Type="", Rotation animation boost -->
<Config
Id="0x00001090" Enable="true" Timeout="1000" Target="sdm660"
Resources="0x40800100, 1000, 0x4280C000, 596" />
<Config
Id="0x00001090" Enable="true" Timeout="1000" Target="sdm658"
Resources="0x40800100, 1000, 0x4280C000, 596" />
<Config
Id="0x00001090" Enable="true" Timeout="1000" Target="sdm630"
Resources="0x40800100, 1000, 0x4280C000, 596" />
<Config
Id="0x00001090" Enable="true" Timeout="1000" Target="sdm455"
Resources="0x40800100, 1000, 0x4280C000, 596" />
<!--Display on Resource -->
<!-- Display on resource opcode, value -->
<Config
Id="0x00001041" Enable="true" Timeout="0" Target="sdm660"
Resources="0x40000000, 1" />
<Config
Id="0x00001041" Enable="true" Timeout="0" Target="sdm658"
Resources="0x40000000, 1" />
<Config
Id="0x00001041" Enable="true" Timeout="0" Target="sdm630"
Resources="0x40000000, 1" />
<Config
Id="0x00001041" Enable="true" Timeout="0" Target="sdm455"
Resources="0x40000000, 1" />
<!--Display off Resource -->
<!-- Display on resource opcode, value -->
<Config
Id="0x00001040" Enable="true" Timeout="0" Target="sdm660"
Resources="0x40000000, 0x0" />
<Config
Id="0x00001040" Enable="true" Timeout="0" Target="sdm658"
Resources="0x40000000, 0x0" />
<Config
Id="0x00001040" Enable="true" Timeout="0" Target="sdm630"
Resources="0x40000000, 0x0" />
<Config
Id="0x00001040" Enable="true" Timeout="0" Target="sdm455"
Resources="0x40000000, 0x0" />
</PerfBoost>
</BoostConfigs>
-43
View File
@@ -1,43 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
* Copyright (c) 2019 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<!-- This is PerfConfigsStore file which returns the value when a
particular property name is invoked -->
<!-- This file supports only Prop tag, which has the following fields
* Name, to identify the name of the property. The names of the
properties have been classified into Vendor and System property.
* Value, the new value to be returned as string when respective
property Name is called. -->
<PerfConfigsStore>
<PerfConfigs>
<!--Vendor Properties -->
<Prop Name="vendor.iop.enabled" Value="false" />
<Prop Name="vendor.iop.enable_uxe" Value="0" />
<Prop Name="vendor.perf.iop_v3.enable" Value="0" />
<Prop Name="vendor.perf.iop_v3.enable.debug" Value="0" />
<Prop Name="vendor.enable.prefetch" Value="0" />
<Prop Name="vendor.iop.enable_prefetch_ofr" Value="0" />
<!--System Properties -->
<Prop Name="ro.vendor.qti.sys.fw.bg_apps_limit" Value="60" />
<Prop Name="ro.vendor.at_library" Value="libqti-at.so" />
<Prop Name="ro.lmk.enable_userspace_lmk" Value="false" />
<Prop Name="vendor.perf.gestureflingboost.enable" Value="true" />
<Prop Name="ro.lmk.enable_userspace_lmk" Value="true" Kernel="4.19" />
<Prop Name="ro.lmk.kill_heaviest_task_dup" Value="true" Kernel="4.19" />
<Prop Name="ro.lmk.enhance_batch_kill" Value="false" Kernel="4.19" />
<Prop Name="ro.lmk.enable_watermark_check" Value="true" Kernel="4.19" />
<Prop Name="ro.lmk.use_new_strategy_dup" Value="true" Kernel="4.19" />
<Prop Name="ro.lmk.super_critical" Value="606" Kernel="4.19" />
<Prop Name="ro.lmk.direct_reclaim_pressure" Value="45" Kernel="4.19" />
</PerfConfigs>
</PerfConfigsStore>
-103
View File
@@ -1,103 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
* Copyright (c) 2017-2018 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<TargetConfig>
<!-- All the target related information goes in TargetInfo tag.
Following are the supported fields for TargetInfo tag.
Mandatory Fields
* NumClusters, number of clusters
* TotalNumCores, total number of cores
* SocIds, a comma seperated list of supported socids for this target.
Other Fields
* Target, target name.
* SynCore, default value is "1" implies sync core and change to "0" for async core.
* CoreCtlCpu, core_ctl is enabled on which physical core, defalut value is "-1".
* MinCoreOnline, minimum number of cores needed to be online, default value is "0"
* GovInstanceType, default value "0" which implies "CLUSTER_BASED_GOV_INSTANCE",
can be changed to "1" for "SINGLE_GOV_INSTANCE".
* CpufreqGov, default value is "0" which implies "INTERACTIVE", can be changed it
to "1" for "SCHEDUTIL".
-->
<!-- For each cluster,write a seperate ClustersInfo tag.
Following are the supported fields for ClustersInfo tag.
Mandatory Fields
* Id, cluster number starts with index 0.
* NumCores, total number of cores for that cluster.
Other Fields
* Type, whther a "little" or "big" cluster.
(Type is mandatory, If there is more than one cluster.)
* MaxFrequency, Any limitations for max frequency for that cluster.
-->
<!-- For targets sharing the same platfrom, we can have seperate config tag for each
of those targets with different number in the Config tag and basing on the socId
of the target device, we decide which configs to consider. -->
<Config1>
<TargetInfo
Target="sdm660"
NumClusters="2"
TotalNumCores="8"
SocIds="317,324,345,346"
SynCore="1"
CoreCtlCpu="4"
MinCoreOnline="0" />
<ClustersInfo Id="0" NumCores="4" Type="little" />
<ClustersInfo Id="1" NumCores="4" Type="big" />
</Config1>
<Config2>
<TargetInfo
Target="sdm630"
NumClusters="2"
TotalNumCores="8"
SocIds="318,327"
SynCore="1"
MinCoreOnline="0" />
<ClustersInfo Id="0" NumCores="4" Type="big" />
<ClustersInfo Id="1" NumCores="4" Type="little" />
</Config2>
<Config3>
<TargetInfo
Target="sdm658"
NumClusters="2"
TotalNumCores="6"
SocIds="325,326"
SynCore="1"
CoreCtlCpu="4"
MinCoreOnline="0" />
<ClustersInfo Id="0" NumCores="2" Type="little" />
<ClustersInfo Id="1" NumCores="4" Type="big" />
</Config3>
<Config4>
<TargetInfo
Target="sdm455"
NumClusters="2"
TotalNumCores="8"
SocIds="385"
SynCore="1"
MinCoreOnline="0" />
<ClustersInfo Id="0" NumCores="4" Type="big" />
<ClustersInfo Id="1" NumCores="4" Type="little" />
</Config4>
</TargetConfig>
-143
View File
@@ -1,143 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
* Copyright (c) 2017-2018 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Confidential and Proprietary - Qualcomm Technologies, Inc.
-->
<!-- This is a target specific resource config file which can be
used to overwrite the node paths mentioned in common resources file
and also to mention the resources which are not supported. -->
<!-- This file supports only Config tag, which has the following fields
* MajorValue and MinorValue, both are required to uniquely
identify the resource.
* Node, the new node path to overwrite the already existing one
of commonresourceconfigs.xml file.
* Supported, to indicate whether the resource is supported or not.
* For each config tag, either of Node or Supported fields need
to be mentioned. -->
<!-- NOTE - It is not Mandatory to write all the resources which are not supported
as anyway perflock calls of these resources would fail. -->
<ResourceConfigs>
<PerfResources>
<Config MajorValue="0x1" MinorValue="0x2" Kernel="4.4" Supported="no" /> <!-- lpm_bias_hyst -->
<Config MajorValue="0x1" MinorValue="0x1" Kernel="4.14" Supported="no" /> <!-- perf-l2-pc/idle_enabled -->
<Config MajorValue="0x1" MinorValue="0x3" Kernel="4.14" Supported="no" /> <!-- ref_stddev -->
<Config MajorValue="0x1" MinorValue="0x4" Kernel="4.14" Supported="no" /> <!-- tmr_add -->
<Config MajorValue="0x1" MinorValue="0x2" Kernel="4.19" Supported="no" /> <!-- lpm_bias_hyst -->
<Config MajorValue="0x1" MinorValue="0x3" Kernel="4.19" Supported="no" /> <!-- lpm_ref_stddev -->
<Config MajorValue="0x1" MinorValue="0x4" Kernel="4.19" Supported="no" /> <!-- lpm_tmr_add -->
<Config MajorValue="0x3" MinorValue="0x2" Kernel="4.14" Supported="no" /> <!-- sched_migration_cost_ns -->
<Config MajorValue="0x3" MinorValue="0x3" Supported="no" /> <!-- sched_small_task -->
<Config MajorValue="0x3" MinorValue="0x6" Kernel="4.14" Supported="no" /> <!-- sched_init_task_load -->
<Config MajorValue="0x3" MinorValue="0xB" Kernel="4.14" Supported="no" /> <!-- sched_spill_nr_run -->
<Config MajorValue="0x3" MinorValue="0xC" Kernel="4.14" Supported="no" /> <!-- sched_static_cpu_pwr_cost -->
<Config MajorValue="0x3" MinorValue="0xD" Kernel="4.14" Supported="no" /> <!-- sched_restrict_cluster_spill -->
<Config MajorValue="0x3" MinorValue="0x13" Kernel="4.14" Supported="no" /> <!-- sched_freq_aggregate -->
<Config MajorValue="0x3" MinorValue="0x14" Kernel="4.14" Supported="no" /> <!-- sched_enable_thread_grouping -->
<Config MajorValue="0x3" MinorValue="0x17" Kernel="4.14" Supported="no" /> <!-- sched_freq_aggregate_threshold -->
<Config MajorValue="0x3" MinorValue="0x19" Kernel="4.14" Supported="no" /> <!-- sched_initial_task_util -->
<Config MajorValue="0x3" MinorValue="0x21" Kernel="4.14" Supported="no" /> <!-- sched_user_hint -->
<Config MajorValue="0x3" MinorValue="0x22" Kernel="4.14" Supported="no" /> <!-- sched_task_unfilter_nr_windows -->
<Config MajorValue="0x3" MinorValue="0x23" Kernel="4.14" Supported="no" /> <!-- sched_coloc_downmigrate_ns -->
<Config MajorValue="0x3" MinorValue="0x24" Kernel="4.14" Supported="no" /> <!-- sched_coloc_busy_hysteresis_enable_cpus -->
<Config MajorValue="0x3" MinorValue="0x25" Kernel="4.14" Supported="no" /> <!-- sched_coloc_busy_hyst_ns -->
<Config MajorValue="0x3" MinorValue="0x26" Kernel="4.14" Supported="no" /> <!-- sched_window_stats_policy -->
<Config MajorValue="0x3" MinorValue="0x29" Kernel="4.14" Supported="no" /> <!-- sched_ravg_window_nr_ticks -->
<Config MajorValue="0x3" MinorValue="0x6" Kernel="4.19" Supported="no" /> <!-- sched_init_task_load -->
<Config MajorValue="0x3" MinorValue="0xB" Kernel="4.19" Supported="no" /> <!-- sched_spill_nr_run -->
<Config MajorValue="0x3" MinorValue="0xC" Kernel="4.19" Supported="no" /> <!-- sched_static_cpu_pwr_cost -->
<Config MajorValue="0x3" MinorValue="0xD" Kernel="4.19" Supported="no" /> <!-- sched_restrict_cluster_spill -->
<Config MajorValue="0x3" MinorValue="0x13" Kernel="4.19" Supported="no" /> <!-- sched_set_freq_aggr -->
<Config MajorValue="0x3" MinorValue="0x14" Kernel="4.19" Supported="no" /> <!-- sched_enable_thread_grouping -->
<Config MajorValue="0x3" MinorValue="0x17" Kernel="4.19" Supported="no" /> <!-- sched_freq_aggr_threshold -->
<Config MajorValue="0x3" MinorValue="0x19" Kernel="4.19" Supported="no" /> <!-- sched_initial_task_util -->
<Config MajorValue="0x3" MinorValue="0x21" Kernel="4.19" Supported="no" /> <!-- sched_user_hint -->
<Config MajorValue="0x3" MinorValue="0x22" Kernel="4.19" Supported="no" /> <!-- sched_task_unfilter_nr_windows -->
<!-- For INTERACTIVE major, all the interactive minors are not supported by default as the recent target moved to schedutil.
So, for older targets where interactive minors are supported they need to be enabled and schedutil minors are disabled. -->
<Config MajorValue="0x5" MinorValue="0x0" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x1" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x3" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x4" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x5" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x6" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x7" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x8" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x9" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xA" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xB" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xC" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xD" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xE" Kernel="4.4" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0xF" Kernel="4.4" Supported="no" />
<Config MajorValue="0x5" MinorValue="0x10" Kernel="4.4" Supported="no" />
<Config MajorValue="0x5" MinorValue="0x11" Kernel="4.4" Supported="no" />
<Config MajorValue="0x5" MinorValue="0x12" Kernel="4.4" Supported="no" />
<Config MajorValue="0x5" MinorValue="0xF" Kernel="4.14" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x10" Kernel="4.14" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x11" Kernel="4.14" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x12" Kernel="4.14" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x13" Supported="no" />
<Config MajorValue="0x5" MinorValue="0xF" Kernel="4.19" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x10" Kernel="4.19" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x11" Kernel="4.19" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x12" Kernel="4.19" Supported="yes" />
<Config MajorValue="0x5" MinorValue="0x13" Kernel="4.19" Supported="yes" />
<!--All the cpubw_hwmon path are now migrated to new opcodes. Hence unsupporting old ones-->
<Config MajorValue="0x6" MinorValue="0x0" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x1" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x2" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x3" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x4" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x5" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x6" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x7" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x8" Node="/sys/class/devfreq/soc:qcom,cpu-cpu-ddr-bw/bw_hwmon/sample_ms" />
<Config MajorValue="0x6" MinorValue="0x9" Kernel="4.19" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xA" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xB" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xC" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xD" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xE" Supported="no" />
<Config MajorValue="0x6" MinorValue="0xF" Supported="no" />
<Config MajorValue="0x6" MinorValue="0x10" Supported="no"/>
<Config MajorValue="0xB" MinorValue="0x2" Kernel="4.19" Node="/sys/devices/system/cpu/cpu_boost/input_boost_freq" /> <!-- input_boost_freq on kernel 4.19 -->
<!-- All the minors of LLCBW_HWMON MAJOR are not supported -->
<Config MajorValue="0xC" MinorValue="0x0" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x1" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x2" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x3" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xA" Kernel="4.19" Supported="no" /> <!-- cpubw_hmon_low_power_ceil_mbps -->
<Config MajorValue="0xC" MinorValue="0xB" Kernel="4.19" Supported="no" /> <!-- cpubw_hmon_low_power_io_percent -->
<Config MajorValue="0xC" MinorValue="0x4" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x5" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x6" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x7" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x8" Supported="no" />
<Config MajorValue="0xC" MinorValue="0x9" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xA" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xB" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xC" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xD" Supported="no" />
<Config MajorValue="0xC" MinorValue="0xE" Supported="no" />
<Config MajorValue="0xD" MinorValue="0x0" Supported="no" /> <!-- l3_min_freq -->
</PerfResources>
</ResourceConfigs>
-47
View File
@@ -1,47 +0,0 @@
<?xml version="1.0" encoding="utf-8" ?>
<!--
/* Copyright (c) 2016-2018,2020-2021. The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-->
<HintConfigs>
<Powerhint>
<!-- camera 30fps and camera preview -->
<!--sample_ms = 10mS -->
<!--SLB for Core0 = -6 -->
<!--SLB for Core1 = -6 -->
<!--SLB for Core2 = -6 -->
<!--SLB for Core3 = -6 -->
<!--hispeed load = 95 -->
<!--hispeed freq = 1401 -->
<Config
Id="0x00001331" Enable="true" Timeout="0" Target="sdm660"
Resources="0x41820000, 0xa, 0x40c68100, 0xfffffffa, 0x40c68110, 0xfffffffa, 0x40c68120, 0xfffffffa,
0x40c68130, 0xfffffffa, 0x41440100, 0x5f, 0x4143c100, 0x579"/>
</Powerhint>
</HintConfigs>
@@ -78,4 +78,3 @@ getdents64: 1
getsockname: 1
recvfrom: 1
madvise: 1
gettimeofday: 1
+374 -151
View File
@@ -4,7 +4,7 @@
# Tihs file contains default sensor registry values for Qualcomm development
# test platforms.
#
# Copyright (c) 2013-2017 Qualcomm Technologies, Inc.
# Copyright (c) 2013-2018 Qualcomm Technologies, Inc.
# All Rights Reserved.
# Confidential and Proprietary - Qualcomm Technologies, Inc.
@@ -112,9 +112,7 @@
# The numeric fields are parsed with the strtoull function, base 0.
#
# Huaqin modify for sensors conf update by zhuqiang at 2018/04/27 start
:version 0x00010004
# Huaqin modify for sensors conf update by zhuqiang at 2018/04/27 end
:version 0x00010005
#######################################################################
### MSM8976,APQ8076 and MSM8956 Chipsets
@@ -1557,6 +1555,230 @@
6368 0 0x00010001 # inactive pull
6369 0 0x00010001 # inactive drive
:platform QRD
:soc_id 386
# accel x/y/z
700 -1 0x00010001 #accel-x-axis
701 -2 0x00010001 #accel-y-axis
702 3 0x00010001 #accel-z-axis
# mag x/y/z
900 1 0x00010001 #mag-x-axis
901 2 0x00010001 #mag-y-axis
902 3 0x00010001 #mag-z-axis
# SSI SMGR Cfg 0 BMA253
1903 0xc10ffaeed4057c96 0x00010001 #UUID
1902 0xaf4644363f26965d 0x00010001 #UUID
1904 3000 0x00010001 #off_to_idle
1905 0 0x00010001 #idle_to_ready
1906 0x1006 0x00010001 #SPI_bus
1907 1000 0x00010001 #reg_group_id
1908 0 0x00010001 #cal_grp_id
1909 42 0x00010001 #gpio1
1910 0xFFFF 0x00010001 #gpio2
1911 0 0x00010001 #sensor_id
1912 0 0x00010001 #spi_CS
1913 1 0x00010001 #data_type1
1914 0 0x00010001 #data_type2
1915 -1 0x00010001 #rel_sns_idx
1916 1 0x00010001 #sens_default
1917 0xD0 0x00010001 #flags
1982 0 0x00010001 #device_select
1987 0xff 0x00010001 #vdd
1988 0xff 0x00010001 #vddio
# SSI SMGR Cfg 1: AKM09911
1919 0x90611b98d561168f 0x00010001 #UUID
1918 0x564d2b94fe80aef6 0x00010001 #UUID
1920 3000 0x00010001 #off_to_idle
1921 10000 0x00010001 #idle_to_ready
1922 0x1006 0x00010001 #SPI_bus
1923 1020 0x00010001 #reg_group_id
1924 0xFFFF 0x00010001 #cal_grp_id
1925 44 0x00010001 #gpio1
1926 0xFFFF 0x00010001 #gpio2
1927 20 0x00010001 #sensor_id
1928 1 0x00010001 #CS_for_SPI
1929 2 0x00010001 #data_type1
1930 0 0x00010001 #data_type2
1931 0xFF 0x00010001 #rel_sns_idx
1932 1 0x00010001 #sens_default
1933 0xD0 0x00010001 #flags
1983 0 0x00010001 #device_select
1989 0xff 0x00010001 #vdd
1990 0xff 0x00010001 #vddio
# SSI SMGR Cfg 2: TMG490X prx/als DRI
1935 0x3a83587c79f2d5ad 0x00010001 #UUID
1934 0xd24fdac0d73b50aa 0x00010001 #UUID
1936 5700 0x00010001 #off_to_idle
1937 5000 0x00010001 #idle_to_ready
1938 4 0x00010001 #i2c_bus
1939 1040 0x00010001 #reg_group_id
1940 0xFFFF 0x00010001 #cal_grp_id
1941 43 0x00010001 #gpio1
1942 0xFFFF 0x00010001 #gpio2
1943 40 0x00010001 #sensor_id
1944 0x39 0x00010001 #i2c_address
1945 5 0x00010001 #data_type1
1946 6 0x00010001 #data_type2
1947 0xFF 0x00010001 #rel_sns_idx
1948 0 0x00010001 #sens_default
1949 0x80 0x00010001 #flags
1984 0 0x00010001 #device_select
1991 0xff 0x00010001 #vdd
1992 0xff 0x00010001 #vddio
# SSI SMGR Cfg 3: None
1951 0 0x00010001 #UUID
1950 0 0x00010001 #UUID
# SSI SMGR Cfg 4: None
1967 0 0x00010001 #UUID
1966 0 0x00010001 #UUID
# SSI SMGR Version
3600 1 0x00010001 #Maj Ver
3601 2 0x00010001 #Min Ver
# SSI SMGR Cfg 5: TMG490X RGB DRI
3603 0 #UUID
3602 0 #UUID
# TMG490x parameters
100 0x00 0x00010001 #visible_light_trans_ratio
101 0x00 0x00010001 #ir_light_trans_ratio
102 0x0000 0x00010001 #dc_offset
103 0x0BB8 0x00010001 #near_threshold
104 0x0000 0x00010001 #far_threshold
105 0x0000 0x00010001 #prx_factor
106 0x0078 0x00010001 #als factor
107 0x00000AD0 0x00010001 #timeBase_us
108 0x0002012C 0x00010001 #LuxTargetError16_LuxTarget16
109 0x1A0004B0 0x00010001 #ProxHardThresh16_LuxcalibrationFactor16
#110 0x0000008D 0x00010001 #Checksum of items 100-109(sum_of_bytes+num_of_bytes)&FF
111 0x0000001E 0x00010001 #R_coef:30
112 0x000003E8 0x00010001 #G_coef:1000
113 0xFFFFFE34 0x00010001 #B_coef:-460
114 0x000037AB 0x00010001 #D_factor:14251
115 0x000015C2 0x00010001 #CT_coef:5570
116 0x0000063F 0x00010001 #CT_offset:1599
#accel dri
6300 1 0x00010001 # version
6301 0x002A 0x00010001 # gpio num
6302 0 0x00010001 # active func sel
6303 0 0x00010001 # active dir
6304 0 0x00010001 # active pull
6305 0 0x00010001 # active drive
6306 0 0x00010001 # inactive func sel
6307 0 0x00010001 # inactive dir
6308 1 0x00010001 # inactive pull
6309 0 0x00010001 # inactive drive
#mag dri
6310 1 0x00010001 # version
6311 0x002C 0x00010001 # gpio num
6312 0 0x00010001 # active func sel
6313 0 0x00010001 # active dir
6314 0 0x00010001 # active pull
6315 0 0x00010001 # active drive
6316 0 0x00010001 # inactive func sel
6317 0 0x00010001 # inactive dir
6318 0 0x00010001 # inactive pull
6319 0 0x00010001 # inactive drive
#proximity and light dri
6320 1 0x00010001 # version
6321 0x002B 0x00010001 # gpio num
6322 0 0x00010001 # active func sel
6323 0 0x00010001 # active dir
6324 0 0x00010001 # active pull
6325 0 0x00010001 # active drive
6326 0 0x00010001 # inactive func sel
6327 0 0x00010001 # inactive dir
6328 0 0x00010001 # inactive pull
6329 0 0x00010001 # inactive drive
#SPI GPIO active and inactive
6330 1 0x00010001 # version
6331 0x0014 0x00010001 # gpio num
6332 1 0x00010001 # active func sel
6333 1 0x00010001 # active dir
6334 0 0x00010001 # active pull
6335 3 0x00010001 # active drive
6336 0 0x00010001 # inactive func sel
6337 0 0x00010001 # inactive dir
6338 2 0x00010001 # inactive pull
6339 0 0x00010001 # inactive drive
6340 1 0x00010001 # version
6341 0x0015 0x00010001 # gpio num
6342 1 0x00010001 # active func sel
6343 0 0x00010001 # active dir
6344 0 0x00010001 # active pull
6345 3 0x00010001 # active drive
6346 0 0x00010001 # inactive func sel
6347 0 0x00010001 # inactive dir
6348 2 0x00010001 # inactive pull
6349 0 0x00010001 # inactive drive
6350 1 0x00010001 # version
6351 0x0016 0x00010001 # gpio num
6352 1 0x00010001 # active func sel
6353 1 0x00010001 # active dir
6354 0 0x00010001 # active pull
6355 3 0x00010001 # active drive
6356 0 0x00010001 # inactive func sel
6357 0 0x00010001 # inactive dir
6358 2 0x00010001 # inactive pull
6359 0 0x00010001 # inactive drive
6360 1 0x00010001 # version
6361 0x0017 0x00010001 # gpio num
6362 1 0x00010001 # active func sel
6363 1 0x00010001 # active dir
6364 0 0x00010001 # active pull
6365 3 0x00010001 # active drive
6366 0 0x00010001 # inactive func sel
6367 0 0x00010001 # inactive dir
6368 2 0x00010001 # inactive pull
6369 0 0x00010001 # inactive drive
6370 1 0x00010001 # version
6371 0x002F 0x00010001 # gpio num
6372 1 0x00010001 # active func sel
6373 1 0x00010001 # active dir
6374 0 0x00010001 # active pull
6375 3 0x00010001 # active drive
6376 0 0x00010001 # inactive func sel
6377 0 0x00010001 # inactive dir
6378 2 0x00010001 # inactive pull
6379 0 0x00010001 # inactive drive
6380 1 0x00010001 # version
6381 0x000E 0x00010001 # gpio num
6382 3 0x00010001 # active func sel
6383 1 0x00010001 # active dir
6384 0 0x00010001 # active pull
6385 0 0x00010001 # active drive
6386 0 0x00010001 # inactive func sel
6387 0 0x00010001 # inactive dir
6388 2 0x00010001 # inactive pull
6389 0 0x00010001 # inactive drive
6390 1 0x00010001 # version
6391 0x000F 0x00010001 # gpio num
6392 3 0x00010001 # active func sel
6393 1 0x00010001 # active dir
6394 0 0x00010001 # active pull
6395 0 0x00010001 # active drive
6396 0 0x00010001 # inactive func sel
6397 0 0x00010001 # inactive dir
6398 2 0x00010001 # inactive pull
6399 0 0x00010001 # inactive drive
#######################################################################
### 8953 Chipsets
#######################################################################
@@ -5398,6 +5620,7 @@
109 0x1A0004B0 0x00010001 #ProxHardThresh16_LuxcalibrationFactor16
#110 0x0000008D 0x00010001 #Checksum of items 100-109(sum_of_bytes+num_of_bytes)&FF
#######################################################################
### sdm660 Chipsets
#######################################################################
@@ -5409,25 +5632,21 @@
:subtype
# Orientation of sensors
# accel x/y/z
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 start
700 1 0x00010001 #accel-x-axis
701 2 0x00010001 #accel-y-axis
700 -2 0x00010001 #accel-x-axis
701 1 0x00010001 #accel-y-axis
702 3 0x00010001 #accel-z-axis
# gyro x/y/z
800 1 0x00010001 #gyro-x-axis
801 2 0x00010001 #gyro-y-axis
800 -2 0x00010001 #gyro-x-axis
801 1 0x00010001 #gyro-y-axis
802 3 0x00010001 #gyro-z-axis
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 end
# mag x/y/z
# Huaqin modify for ZQL1650-142 by chenyijun5 at 2018/01/19 start
900 -1 0x00010001 #mag-x-axis
901 -2 0x00010001 #mag-y-axis
900 -2 0x00010001 #mag-x-axis
901 1 0x00010001 #mag-y-axis
902 3 0x00010001 #mag-z-axis
#Huaqin modify for disable bma253/enable bmi120 by zhuqiang at 2018/04/27 start
# SSI SMGR Version
1900 0 0x00010005 #Maj Ver
1901 2 0x00010005 #Min Ver
# Huaqin modify for ZQL1650-142 by chenyijun5 at 2018/01/19 end
1900 1 0x00010001 #Maj Ver
1901 2 0x00010001 #Min Ver
# SAM config
#
203 65536 0x10001 # AMD
@@ -5459,135 +5678,68 @@
223 0x00001657 0x00010001 #RMD_INT_cfg_prm3
224 0x00003333 0x00010001 #RMD_INT_cfg_prm4
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 start
# SSI ACC SENSOR
2000 2 0x00010005
# Huaqin modify for 2nd accel sensor by chenyijun5 at 2018/02/06 start
2001 2 0x00010005
# Huaqin modify for 2nd accel sensor by chenyijun5 at 2018/02/06 end
# SSI SMGR Cfg 0: LSM6DSM Accel DRI/FIFO
1903 0x68534cfc401dc2ac 0x00010001 #UUID
1902 0xbe48af52e826fd3c 0x00010001 #UUID
1904 100000 0x00010001 #off_to_idle
1905 100000 0x00010001 #idle_to_ready
1906 0x1001 0x00010001 #SPI_bus
1907 1000 0x00010001 #reg_group_id
1908 0 0x00010001 #cal_grp_id
1909 68 0x00010001 #gpio1
1910 0xFFFF 0x00010001 #gpio2
1911 0 0x00010001 #sensor_id
1912 0 0x00010001 #CS for SPI
1913 1 0x00010001 #data_type1
1914 4 0x00010001 #data_type2
1915 -1 0x00010001 #rel_sns_idx
1916 2 0x00010001 #sens_default
1917 0xD0 0x00010001 #flags
1982 0 0x00010001 #device_select
1987 0x8E 0x00010001 #vdd
1988 0x8E 0x00010001 #vddio
# SSI SMGR Cfg 0 BMI120 ACCEL
2002 0xd646cb83ec0cd5a5 0x00010005 #UUID
2003 0x0f4d0fd654c7eab5 0x00010005 #UUID
2004 30000 0x00010005 #off_to_idle
2005 0 0x00010005 #idle_to_ready
2006 70 0x00010005 #gpio1
2007 1000 0x00010005 #reg_group_id
2008 0 0x00010005 #cal_grp_id
2009 3 0x00010005 #i2c_bus
2010 0x68 0x00010005 #i2c_address
2011 3 0x00010005 #sens_default
2012 0xD0 0x00010005 #flags
2068 0x83 0x00010005 #vdd
2069 0x8E 0x00010005 #vddio
# SSI SMGR Cfg 1: LSM6DSM Gyro DRI/FIFO
1919 0x68534cfc401dc2ac 0x00010001 #UUID
1918 0xbe48af52e826fd3c 0x00010001 #UUID
1920 100000 0x00010001 #off_to_idle
1921 100000 0x00010001 #idle_to_ready
1922 0x1001 0x00010001 #SPI_bus
1923 1010 0x00010001 #reg_group_id
1924 10 0x00010001 #cal_grp_id
1925 68 0x00010001 #gpio1
1926 0xFFFF 0x00010001 #gpio2
1927 10 0x00010001 #sensor_id
1928 0 0x00010001 #CS for SPI
1929 3 0x00010001 #data_type1
1930 4 0x00010001 #data_type2
1931 -1 0x00010001 #rel_sns_idx
1932 4 0x00010001 #sens_default
1933 0xD0 0x00010001 #flags
1983 0 0x00010001 #device_select
1989 0x8E 0x00010001 #vdd
1990 0x8E 0x00010001 #vddio
# Huaqin add for ZQL1650-145:bma253 by chenyijun5 at 2018/01/27 start
#SSI SMGR Cfg1 BMA253 ACCEL
#2002 0xaf4644363f26965d 0x00010004 #UUID
#2003 0xc10ffaeed4057c96 0x00010004 #UUID
#2004 3000 0x00010004 #off_to_idle
#2005 0 0x00010004 #idle_to_ready
#2006 69 0x00010004 #gpio1
#2007 1000 0x00010004 #reg_group_id
#2008 0 0x00010004 #cal_grp_id
#2009 3 0x00010004 #i2c_bus
#2010 0x18 0x00010004 #i2c_address
#2011 1 0x00010004 #sens_default
#2012 0xD0 0x00010004 #flags
#2068 0x83 0x00010004 #vdd
#2069 0x8E 0x00010004 #vddio
# Huaqin add for ZQL1650-145:bma253 by chenyijun5 at 2018/01/27 end
# Huaqin modify for 2nd a+g icm206xx by chenyijun5 at 2018/02/06 start
#SSI SMGR Cfg2 ICM206xx ACCEL
2024 0xc14075963795c661 0x00010001 #UUID
2025 0x0b25b8431bfd46bc 0x00010001 #UUID
2026 100000 0x00010001 #off_to_idle
2027 20000 0x00010001 #idle_to_ready
2028 69 0x00010001 #gpio1
2029 1000 0x00010001 #reg_group_id
2030 0 0x00010001 #cal_pri_grp_id
2031 3 0x00010001 #i2c_bus
2032 0x68 0x00010001 #i2c_address
2033 2 0x00010001 #sens_default
2034 0xD0 0x00010001 #flags
2072 0x83 0x00010001 #vdd
2073 0x8E 0x00010001 #vddio
# SSI GYRO SENSOR
2100 2 0x00010005
2101 2 0x00010005
# SSI SMGR Cfg 0 BMI120 GYRO
2102 0xd646cb83ec0cd5a5 0x00010005 #UUID
2103 0x0f4d0fd654c7eab5 0x00010005 #UUID
2104 30000 0x00010005 #off_to_idle
2105 0 0x00010005 #idle_to_ready
2106 70 0x00010005 #gpio1
2107 1010 0x00010005 #reg_group_id
2108 10 0x00010005 #cal_grp_id
2109 3 0x00010005 #i2c_bus
2110 0x68 0x00010005 #i2c_address
2111 3 0x00010005 #sens_default
2112 0xD0 0x00010005 #flags
2168 0x83 0x00010005 #vdd
2169 0x8E 0x00010005 #vddio
# SSI SMGR Cfg1 ICM206xx GYRO
2113 0xc14075963795c661 0x00010001 #UUID
2114 0x0b25b8431bfd46bc 0x00010001 #UUID
2115 100000 0x00010001 #off_to_idle
2116 80000 0x00010001 #idle_to_ready
2117 69 0x00010001 #gpio1
2118 1010 0x00010001 #reg_group_id
2119 10 0x00010001 #cal_pri_grp_id
2120 3 0x00010001 #i2c_bus
2121 0x68 0x00010001 #i2c_address
2122 2 0x00010001 #sens_default
2123 0xD0 0x00010001 #flags
2170 0x83 0x00010001 #vdd
2171 0x8E 0x00010001 #vddio
# Huaqin add for 2nd a+g icm206xx by chenyijun5 at 2018/02/06 end
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 end
# Huaqin modify for ZQL1650-142 by chenyijun5 at 2018/01/19 start
# SSI MAG SENSOR
2200 2 0x00010001 # set to 2 to enable--smd660
# Huaqin modify for 2nd mag-VTC by chenyijun5 at 2018/02/06 start
2201 2 0x00010001 # set this to number
# SSI Cfg0 AKM099XX_FIFO
2203 0x90611b98d561168f 0x00010001 #UUID
2202 0x564d2b94fe80aef6 0x00010001 #UUID
2204 3000 0x00010001 #off_to_idle
2205 10000 0x00010001 #idle_to_ready
2206 0xFFFF 0x00010001 #gpio1
2207 1020 0x00010001 #reg_group_id
2208 0 0x00010001 #cal_pri_grp_id
2209 3 0x00010001 #i2c_bus
2210 0x0C 0x00010001 #i2c_address
2211 3 0x00010001 #sens_default
2212 0 0x00010001 #flags
2268 0x83 0x00010001 #vdd
2269 0x8E 0x00010001 #vddio
# Huaqin modify for ZQL1650-142 by chenyijun5 at 2018/01/19 end
# Huaqin modify off_to_idle by zhuqiang at 2018/04/20 start
2213 0x4444444444444444 0x00010001 #UUID
2214 0x4444444444444444 0x00010001 #UUID
2215 15000 0x00010004 #off_to_idle
2216 10000 0x00010001 #idle_to_ready
2217 0xFFFF 0x00010001 #gpio1
2218 1020 0x00010001 #reg_group_id
2219 0 0x00010001 #cal_pri_grp_id
2220 3 0x00010001 #i2c_bus
2221 0x0C 0x00010001 #i2c_address
2222 3 0x00010001 #sens_default
2223 0 0x00010001 #flags
2270 0x83 0x00010001 #vdd
2271 0x8E 0x00010001 #vddio
# Huaqin modify off_to_idle by zhuqiang at 2018/04/20 end
# Huaqin modify for 2nd mag-VTC by chenyijun5 at 2018/02/06 end
# SSI SMGR Cfg 2: AKM09915D mag DRI/FIFO
1935 0x90611b98d561168f 0x00010001 #UUID
1934 0x564d2b94fe80aef6 0x00010001 #UUID
1936 3000 0x00010001 #off_to_idle
1937 10000 0x00010001 #idle_to_ready
1938 3 0x00010001 #I2C_bus
1939 1020 0x00010001 #reg_group_id
1940 0x00000014 0x00010001 #cal_grp_id
1941 70 0x00010001 #gpio1
1942 0xFFFF 0x00010001 #gpio2
1943 20 0x00010001 #sensor_id
1944 0x0C 0x00010001 #I2C_address
1945 2 0x00010001 #data_type1
1946 0 0x00010001 #data_type2
1947 0xFF 0x00010001 #rel_sns_idx
1948 0 0x00010001 #sens_default
1949 0xD0 0x00010001 #flags
1984 0 0x00010001 #device_select
1991 0x8E 0x00010001 #vdd
1992 0x8E 0x00010001 #vddio
# SSI SMGR Cfg 3: BMP285 pressure POLL
1951 0x32c31ec17f1c0abd 0x00010001 #UUID
@@ -5641,11 +5793,7 @@
2700 1 0x00010001 #maj ver
2701 0 0x00010001 #min ver
2706 0xFFFF 0x00010001 #RESET pin
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 start
2709 69 0x00010001 #ACCEL DR
2710 70 0x00010004 #GYRO DRI
# Huaqin modify for ZQL1650-144 by chenyijun5 at 2018/01/19 end
#Huaqin modify for disable bma253/enable bmi120 by zhuqiang at 2018/04/27 end
# Mag Cal config
#-----------------------------
3801 1 0x00010001
@@ -5662,7 +5810,6 @@
# SSC GPIO CFG (Unused)
#-----------------------------
#
# Huaqin add for remove hbtp gpio config by xudayi at 2018/03/09 start
#6300 1 0x00010001 # version
#6301 0x0104 0x00010001 # gpio num
#6302 2 0x00010001 # active func sel
@@ -5706,7 +5853,6 @@
#6337 0 0x00010001 # inactive dir
#6338 2 0x00010001 # inactive pull
#6339 3 0x00010001 # inactive drive
# Huaqin add for remove hbtp gpio config by xudayi at 2018/03/09 end
6340 1 0x00010001 # version
6341 0x010C 0x00010001 # gpio num
@@ -5885,6 +6031,9 @@
900 2 0x00010001 #max-x-axis
901 1 0x00010001 #mag-y-axis
902 -3 0x00010001 #mag-z-axis
# SSI SMGR Version
1900 0 0x00010005 #Maj Ver
1901 2 0x00010005 #Min Ver
# SSI SMGR Cfg 0: LSM6DSM Accel DRI/FIFO
1903 0x68534cfc401dc2ac 0x00010001 #UUID
1902 0xbe48af52e826fd3c 0x00010001 #UUID
@@ -5972,6 +6121,80 @@
1967 0x00 0x00010001 #UUID
1966 0x00 0x00010001 #UUID
# SSI ACC SENSOR
2000 2 0x00010005
2001 2 0x00010005
# SSI SMGR Cfg 0 BMI120 ACCEL
2002 0xd646cb83ec0cd5a5 0x00010005 #UUID
2003 0x0f4d0fd654c7eab5 0x00010005 #UUID
2004 30000 0x00010005 #off_to_idle
2005 0 0x00010005 #idle_to_ready
2006 70 0x00010005 #gpio1
2007 1000 0x00010005 #reg_group_id
2008 0 0x00010005 #cal_grp_id
2009 3 0x00010005 #i2c_bus
2010 0x68 0x00010005 #i2c_address
2011 3 0x00010005 #sens_default
2012 0xD0 0x00010005 #flags
2068 0x83 0x00010005 #vdd
2069 0x8E 0x00010005 #vddio
# SSI GYRO SENSOR
2100 2 0x00010005
2101 2 0x00010005
# SSI SMGR Cfg 0 BMI120 GYRO
2102 0xd646cb83ec0cd5a5 0x00010005 #UUID
2103 0x0f4d0fd654c7eab5 0x00010005 #UUID
2104 30000 0x00010005 #off_to_idle
2105 0 0x00010005 #idle_to_ready
2106 70 0x00010005 #gpio1
2107 1010 0x00010005 #reg_group_id
2108 10 0x00010005 #cal_grp_id
2109 3 0x00010005 #i2c_bus
2110 0x68 0x00010005 #i2c_address
2111 3 0x00010005 #sens_default
2112 0xD0 0x00010005 #flags
2168 0x83 0x00010005 #vdd
2169 0x8E 0x00010005 #vddio
# SSI MAG SENSOR
2200 2 0x00010001 # set to 2 to enable--smd660
2201 2 0x00010001 # set this to number
# SSI Cfg0 AKM099XX_FIFO
2203 0x90611b98d561168f 0x00010001 #UUID
2202 0x564d2b94fe80aef6 0x00010001 #UUID
2204 3000 0x00010001 #off_to_idle
2205 10000 0x00010001 #idle_to_ready
2206 0xFFFF 0x00010001 #gpio1
2207 1020 0x00010001 #reg_group_id
2208 0 0x00010001 #cal_pri_grp_id
2209 3 0x00010001 #i2c_bus
2210 0x0C 0x00010001 #i2c_address
2211 3 0x00010001 #sens_default
2212 0 0x00010001 #flags
2268 0x83 0x00010001 #vdd
2269 0x8E 0x00010001 #vddio
# SSI MAG SENSOR AF6133
2213 0x4444444444444444 0x00010001 #UUID
2214 0x4444444444444444 0x00010001 #UUID
2215 15000 0x00010004 #off_to_idle
2216 10000 0x00010001 #idle_to_ready
2217 0xFFFF 0x00010001 #gpio1
2218 1020 0x00010001 #reg_group_id
2219 0 0x00010001 #cal_pri_grp_id
2220 3 0x00010001 #i2c_bus
2221 0x0C 0x00010001 #i2c_address
2222 3 0x00010001 #sens_default
2223 0 0x00010001 #flags
2270 0x83 0x00010001 #vdd
2271 0x8E 0x00010001 #vddio
3619 0x00 0x00010001 #UUID
3618 0x00 0x00010001 #UUID
@@ -1,23 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<!-- Copyright (C) 2019 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-->
<manifest version="1.0" type="device">
<hal format="hidl">
<name>android.hardware.drm</name>
<transport>hwbinder</transport>
<fqname>@1.3::ICryptoFactory/widevine</fqname>
<fqname>@1.3::IDrmFactory/widevine</fqname>
</hal>
</manifest>
@@ -1,11 +0,0 @@
<manifest version="1.0" type="device">
<hal format="hidl">
<name>vendor.dolby.hardware.dms</name>
<transport>hwbinder</transport>
<version>2.0</version>
<interface>
<name>IDms</name>
<instance>default</instance>
</interface>
</hal>
</manifest>
+21
View File
@@ -0,0 +1,21 @@
-----BEGIN CERTIFICATE-----
MIIDeTCCAmGgAwIBAgIJAKnFNzqHIGkmMA0GCSqGSIb3DQEBBQUAMGkxFzAVBgNV
BAoTDlFVQUxDT01NLCBJbmMuMScwJQYDVQQLEx5DcnlwdG9ncmFwaGljIE9wZXJh
dGlvbnMgR3JvdXAxJTAjBgNVBAMTHFhUUkEgQWRtbmluaXN0cmF0aXZlIFJvb3Qg
djEwHhcNMTEwMzI0MjAwMzQ3WhcNMjYwMzIwMjAwMzQ3WjBpMRcwFQYDVQQKEw5R
VUFMQ09NTSwgSW5jLjEnMCUGA1UECxMeQ3J5cHRvZ3JhcGhpYyBPcGVyYXRpb25z
IEdyb3VwMSUwIwYDVQQDExxYVFJBIEFkbW5pbmlzdHJhdGl2ZSBSb290IHYxMIIB
IDANBgkqhkiG9w0BAQEFAAOCAQ0AMIIBCAKCAQEAp97dbUn5CzvikZSpHOVkevx7
NRAE5OPlyU3rbO1xCHextKpgpRCmGEXmpifN33Q4atSsf0QIoPiq9WtbYZsMU8DZ
YrLuSFH6P9O9fVyqM0sZZpn97frLD7T+/n7r+PqSdoRJnrTD1kaP1iVJuZSaW+sc
x8TIzCJDMf6qWP0zhizqIdFhb4EtgBkRkExUxsQ0xEmBETrbydSEo90be6wLkRgp
AtU208ZKCGrGcNKCNSp9TDkwLn0V408HkQ+iNw4xWpNURWGEoN3h8hOz+O3M6L2S
RxH21P4CnLj0Ag7FqA35JdUtoeSt8UUJnv9kgBh3X0r9oc20+uwlZTOuZW6SkQIB
A6MmMCQwEgYDVR0TAQH/BAgwBgEB/wIBATAOBgNVHQ8BAf8EBAMCAYYwDQYJKoZI
hvcNAQEFBQADggEBADkdmsCBpZG44cJafBzcp7zIM57/fme8LuxbF0f50CHH2FHR
P+HOLZARqHBFID+D8+hIDu3FQrtZg/SRscO+dvGjdILcp77S0Qne1K9TLu16aMBg
wgWmr4mIRG/upqF93qVBzO6ffGR6uHAE7XtP/sRcLG34TmIgTtXEWhDSJHvcjlcf
kF7+kMLHUrRcj20MTggKkWkDkCB0jyG9rZB9s127mEZjEMkEeoXi33NvV8qO2ChE
yKPPlpKQT7tXghS0WfK73fSNSmWaTmUlL8N9Rb50uA0rZdarNDYI7jqJSlGFgE2+
usHoeIDFQK2C6Zha3diWlbs8F3foMXKIfFVhvxo=
-----END CERTIFICATE-----
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